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Número de pieza M30201
Descripción SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Fabricantes Mitsubishi 
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Description
Mitsubishi microcomputers
M30201 Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Description
The M30201 group of single-chip microcomputers are built using the high-performance silicon gate CMOS
process using a M16C/60 Series CPU core. M30201 group is packaged in a 52-pin plastic molded SDIP, or
56-pin plastic molded QFP. These single-chip microcomputers operate using sophisticated instructions
featuring a high level of instruction efficiency. With 1M bytes of address space, they are capable of execut-
ing instructions at high speed.
The M30201 group includes a wide range of products with different internal memory types and sizes and
various package types.
Features
• Basic machine instructions .................. Compatible with the M16C/60 series
• Memory capacity .................................. ROM/RAM (See figure 1.4. ROM expansion.)
• Shortest instruction execution time ...... 100ns (f(XIN)=10MHz)
• Supply voltage ..................................... 4.0 to 5.5V (f(XIN)=10MHz) :mask ROM version
2.7 to 5.5V (f(XIN)=7MHz with software one-wait):mask ROM
version
4.0 to 5.5V (f(XIN)=10MHz) :flash memory version
• Interrupts .............................................. 9 internal and 3 external interrupt sources, 4 software
(including key input interrupt)
• Multifunction 16-bit timer ...................... Timer A x 1, timer B x 2, timer X x 3
• Clock output
• Serial I/O .............................................. 1 channel for UART or clock synchronous, 1 for UART
• A-D converter ....................................... 10 bits X 8 channels (Expandable up to 13 channels)
• Watchdog timer .................................... 1 line
• Programmable I/O ............................... 43 lines
• LED drive ports .................................... 8 ports
• Clock generating circuit ....................... 2 built-in clock generation circuits
(built-in feedback resistor, and external ceramic or quartz oscillator)
Applications
Home appliances, Audio, office equipment, Automobiles
Specifications written in this manual are believed to
be accurate, but are not guaranteed to be entirely
free of error.
Specifications in this manual may be changed for
functional or performance improvements. Please
make sure your manual is the latest edition.
------Table of Contents------
Central Processing Unit (CPU) ..................... 12
Reset ............................................................. 15
Clock Generating Circuit ............................... 19
Protection ...................................................... 26
Interrupts ....................................................... 27
Watchdog Timer ............................................ 35
Timer ............................................................. 37
Serial I/O ....................................................... 64
A-D Converter ............................................... 78
Programmable I/O Ports ............................... 88
Electric Characteristics ................................. 95
Flash Memory version ................................. 126
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M30201 pdf
Description
Mitsubishi microcomputers
M30201 Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Performance Outline
Table 1.1 is performance outline of M30201 group.
Table 1.1. Performance outline of M30201 group
Item
Number of basic instructions
Shortest instruction execution time
Memory
ROM
capacity
RAM
I/O port
P0 to P7
Multifunction TA0
timer
TB0, TB1
TX0, TX1, TX2
Serial I/O UART0
UART1
A-D converter
Watchdog timer
Interrupt
Clock generating circuit
Supply voltage
Power consumption
I/O I/O withstand voltage
characteristics Output current
Device configuration
Package
Performance
91 instructions
100ns (f(XIN)=10MHz
(See figure 4. ROM expansion.)
(See figure 4. ROM expansion.)
43 lines
16 bits x 1
16 bits x 2
16 bits x 3
(UART or clock synchronous) x 1
UART x 1
10 bits x 8 channels (Expandable up to 13 channels)
15 bits x 1 (with prescaler)
9 internal and 3 external sources, 4 software sources
2 built-in clock generation circuits
(built-in feedback resistor, and external ceramic or
quartz oscillator)
4.0 to 5.5V (f(XIN)=10MHz) :mask ROM version
2.7 to 5.5V (f(XIN)=7MHz with software one-wait) :mask
ROM version
4.0 to 5.5V (f(XIN)=10MHz) :flash memory version
18mW (f(XIN)=7MHz with software one-wait, Vcc=3V)
:mask ROM version
95mW (f(XIN)=10MHz no wait, Vcc=5V) :flash memory version
5V
5mA (15mA:LED drive port)
CMOS silicon gate
52-pin plastic mold SDIP
56-pin plastic mold QFP
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M30201 arduino
CPU
Mitsubishi microcomputers
M30201 Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Central Processing Unit (CPU)
The CPU has a total of 13 registers shown in Figure 1.9. Seven of these registers (R0, R1, R2, R3, A0, A1,
and FB) come in two sets; therefore, these have two register banks.
b15
R0(Note)
H
b8 b7
b0
L
b15
R1(Note)
H
b8 b7
b0
L
b15
R2(Note)
b0
Data
registers
b19
PC
b19
INTB H
b15
R3(Note)
b0
b15
USP
b15
A0(Note)
b15
A1(Note)
b0
Address
b0 registers
b15
ISP
b15
SB
b15
FB(Note)
b0
Frame base
registers
b15
FLG
L
b0
Program counter
b0
Interrupt table
register
b0
User stack pointer
b0
Interrupt stack
pointer
b0
Static base
register
b0
Flag register
IPL U I O B S Z D C
Note: These registers consist of two register banks.
Figure 1.9. Central processing unit register
(1) Data registers (R0, R0H, R0L, R1, R1H, R1L, R2, and R3)
Data registers (R0, R1, R2, and R3) are configured with 16 bits, and are used primarily for transfer and
arithmetic/logic operations.
Registers R0 and R1 each can be used as separate 8-bit data registers, high-order bits as (R0H, R1H),
and low-order bits as (R0L, R1L). In some instructions, registers R2 and R0, as well as R3 and R1 can
use as 32-bit data registers (R2R0, R3R1).
(2) Address registers (A0 and A1)
Address registers (A0 and A1) are configured with 16 bits, and have functions equivalent to those of data
registers. These registers can also be used for address register indirect addressing and address register
relative addressing.
In some instructions, registers A1 and A0 can be combined for use as a 32-bit address register (A1A0).
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