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Número de pieza | SDA9401 | |
Descripción | Scan Rate Converter using Embedded DRAM Technology Units | |
Fabricantes | ETC | |
Logotipo | ||
Hay una vista previa y un enlace de descarga de SDA9401 (archivo pdf) en la parte inferior de esta página. Total 30 Páginas | ||
No Preview Available ! PRELIMINARY DATA SHEET
SDA 9401
SCARABAEUS
Scan Rate Converter
using Embedded
DRAM Technology Units
Edition Feb. 28, 2001
6251-558-1PD
1 page SDA 9401
• Flexible clock and synchronization concept
- Decoupling of the input and output clock system possible
• Scan rate conversion
- Simple 100/120 Hz interlaced scan conversion (e.g. AABB, AA*B*B)
- Simple progressive scan conversion (e.g. AA*)
• Flexible digital vertical expansion of the output signal (1.0, ... [1/32] ... , 2.0)
• Flexible output sync controller
- Flexible positioning of the output signal
- Flexible programming of the output sync raster
• Signal manipulations
- Insertion of coloured background
- Vertical and/or horizontal windowing with four different speed factors
- Flash generation
- Still field
- Support of split screen applications
- Multiple picture display - Tuner scan (4 and 16 times for 4:3, 12 times for 16:9 tubes)
- Support of multi picture display with PIP or front-end processor with integrated scaler
(e.g. 9 times display of PIP pictures, picture tracking, random pictures,
still-in-moving picture, moving-in-still picture)
• I²C-bus control (400 kHz)
• P-MQFP-64 package
• 3.3 V ± 5% supply voltage
Micronas
5 Preliminary Data Sheet
5 Page SDA 9401
Field detection and VIN delay
CLK1
H1
H2
VIN
Vd
Ffd
(VINDEL * 128 + 1) * Tclk1
x
Field 1(A)
VIN
Vd
Ffd
Input write parameter
(VINDEL * 128 + 1) * Tclk1
x
Field 2(B)
Parameter
[Default value]
VINDEL
[0]
FIEINV
1: Field A=1
0: Field A=0
[0]
VCRMODE
1: on
0: off
[1]
Subaddress
01h
00h
00h
Description
Delay of the incoming V-Sync VIN (must be adjusted
depending on the delay of the HIN signal)
Inversion of the internal field polarity
In case of non standard interlaced signals (VCR, Play-
Stations) a filtering of the internal field signal can be
done (can also be used for normal TV signals)
In case of non-standard signals the field order is indeterminate (e.g. AAA... , BBB... , AAABAAAB...,
etc.). Therefore a special filtering algorithm is implemented, which can be switched on by the
parameter VCRMODE.
The OPDEL parameter is used to adjust the outgoing V-Sync VOUT in relation to the incoming
delayed V-Sync VIN. In case of 50 Hz to 100 Hz interlaced scan rate conversion the OPDEL
parameter should be greater than half the number of lines of a field plus the internal processing
delay (8 lines).
Input write parameter
Parameter
[Default value]
OPDEL
[170]
Subaddress
06h
Description
Delay (in number of lines) of the internal V-Sync
(delayed VIN) to the outgoing V-Sync (VOUT)
The internal line counter is used to determine the information about the standard of the incoming
Micronas
11 Preliminary Data Sheet
11 Page |
Páginas | Total 30 Páginas | |
PDF Descargar | [ Datasheet SDA9401.PDF ] |
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