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PDF 24C08N Data sheet ( Hoja de datos )

Número de pieza 24C08N
Descripción Two-wore Serial EEPROM
Fabricantes ATMEL Corporation 
Logotipo ATMEL Corporation Logotipo



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No Preview Available ! 24C08N Hoja de datos, Descripción, Manual

Features
Low-voltage and Standard-voltage Operation
– 2.7 (VCC = 2.7V to 5.5V)
– 1.8 (VCC = 1.8V to 5.5V)
Internally Organized 128 x 8 (1K), 256 x 8 (2K), 512 x 8 (4K),
1024 x 8 (8K) or 2048 x 8 (16K)
Two-wire Serial Interface
Schmitt Trigger, Filtered Inputs for Noise Suppression
Bidirectional Data Transfer Protocol
100 kHz (1.8V) and 400 kHz (2.5V, 2.7V, 5V) Compatibility
Write Protect Pin for Hardware Data Protection
8-byte Page (1K, 2K), 16-byte Page (4K, 8K, 16K) Write Modes
Partial Page Writes Allowed
Self-timed Write Cycle (5 ms max)
High-reliability
– Endurance: 1 Million Write Cycles
– Data Retention: 100 Years
Automotive Grade, Extended Temperature and Lead-free/Halogen-free Devices
Available
8-lead PDIP, 8-lead JEDEC SOIC, 8-lead MAP, 5-lead SOT23,
8-lead TSSOP and 8-ball dBGA2 Packages
Die Sales: Wafer Form, Waffle Pack and Bumped Wafers
Two-wire
Serial EEPROM
1K (128 x 8)
2K (256 x 8)
4K (512 x 8)
8K (1024 x 8)
Description
The AT24C01A/02/04/08/16 provides 1024/2048/4096/8192/16384 bits of serial elec-
trically erasable and programmable read-only memory (EEPROM) organized as
128/256/512/1024/2048 words of 8 bits each. The device is optimized for use in many
industrial and commercial applications where low-power and low-voltage operation
are essential. The AT24C01A/02/04/08/16 is available in space-saving 8-lead PDIP,
8-lead JEDEC SOIC, 8-lead MAP, 5-lead SOT23 (AT24C01A/AT24C02/AT24C04), 8-
lead TSSOP, and 8-ball dBGA2 packages and is accessed via a Two-wire serial inter-
face. In addition, the entire family is available in 2.7V (2.7V to 5.5V) and 1.8V (1.8V to
5.5V) versions.
8-lead TSSOP
8-lead SOIC
Table 1. Pin Configuration
Pin Name Function
A0 - A2
Address Inputs
SDA
Serial Data
A0
A1
A2
GND
1
2
3
4
8 VCC
7 WP
6 SCL
5 SDA
A0
A1
A2
GND
1
2
3
4
8 VCC
7 WP
6 SCL
5 SDA
SCL
WP
NC
GND
VCC
Serial Clock Input
Write Protect
No Connect
Ground
Power Supply
8-ball dBGA2
VCC
WP
SCL
SDA
8
7
6
5
1 A0
2 A1
3 A2
4 GND
Bottom View
8-lead MAP
VCC 8
WP 7
SCL 6
SDA 5
1 A0
2 A1
3 A2
4 GND
Bottom View
8-lead PDIP
5-lead SOT23
16K (2048 x 8)
AT24C01A
AT24C02
AT24C04
AT24C08(1)
AT24C16(2)
Note: 1. This device is not recom-
mended for new designs.
Please refer to AT24C08A.
2. This device is not recom-
mended for new designs.
Please refer to AT24C16A.
A0
A1
A2
GND
1
2
3
4
8 VCC
7 WP
6 SCL
5 SDA
SCL
GND
SDA
1
2
3
5 WP
4 VCC
0180T–SEEPR–12/04
1

1 page




24C08N pdf
AT24C01A/02/04/08/16
Table 5. AC Characteristics
Applicable over recommended operating range from TAI = 40°C to +85°C, VCC = +1.8V to +5.5V, VCC = +2.7V to +5.5V,
CL = 1 TTL Gate and 100 pF (unless otherwise noted).
1.8-volt
2.5, 2.7, 5.0-volt
Symbol
Parameter
Min Max Min Max Units
fSCL
tLOW
tHIGH
tI
tAA
tBUF
Clock Frequency, SCL
Clock Pulse Width Low
Clock Pulse Width High
Noise Suppression Time(1)
Clock Low to Data Out Valid
Time the bus must be free before
a new transmission can start(1)
100
400(1)
kHz
4.7 1.2 µs
4.0 0.6 µs
100 50 ns
0.1 4.5 0.1 0.9 µs
4.7 1.2 µs
tHD.STA
Start Hold Time
4.0 0.6 µs
tSU.STA
Start Setup Time
4.7 0.6 µs
tHD.DAT
Data In Hold Time
0 0 µs
tSU.DAT
tR
tF
Data In Setup Time
Inputs Rise Time(1)
Inputs Fall Time(1)
200 100
1.0 0.3
300 300
ns
µs
ns
tSU.STO
Stop Setup Time
4.7 0.6 µs
tDH Data Out Hold Time
100 50
ns
tWR Write Cycle Time
5 5 ms
Endurance(2) 5.0V, 25°C, Byte Mode
1M
1M
Write
Cycles
Note: 1. The 24C01A/02/04 bearing the process letter “D” on the package (the mark is located in the lower right corner on the top
side of the package), guarantees 400 kHz (2.5 – 5.0V).
2. This parameter is characterized and is not 100% tested.
0180T–SEEPR–12/04
5

5 Page





24C08N arduino
Figure 7. Device Address
AT24C01A/02/04/08/16
8K(1)
16K(2)
Notes: 1. This device is not recommended for new designs. Please refer to AT24C08A.
2. This device is not recommended for new designs. Please refer to AT24C16A.
Figure 8. Byte Write
Figure 9. Page Write
(* = DON’T CARE bit for 1K)
0180T–SEEPR–12/04
11

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