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PDF 74OL6000 Data sheet ( Hoja de datos )

Número de pieza 74OL6000
Descripción HIGH-SPEED LOGIC-TO-LOGIC OPTOCOUPLERS
Fabricantes Fairchild Semiconductor 
Logotipo Fairchild Semiconductor Logotipo

74OL6000 datasheet


1. - Logic-TO-Logic Optocoupler - QT






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HIGH-SPEED
LOGIC-TO-LOGIC OPTOCOUPLERS
LSTTL TO
PACKAGE
TTL BUFFER
TTL INVERTER
CMOS BUFFER
CMOS INVERTER
74OL6000
74OL6001
74OL6010
74OL6011
SYMBOL
66
1
1
BUFFER
INVERTER
6
1
DESCRIPTION
OPTOLOGIC™ is the first family of truly logic compatible optically coupled logic interface gates.
The family consists of four device types offering LSTTL to TTL and LSTTL to CMOS interfacing. Each of these interfacing functions
is available as a buffer (A=B), or as an inverter (A=B).
The LSTTL input compatibility is provided by an input integrated circuit, with industry standard logic levels. This input amplifier IC
switches a temperature compensated current source driving a high speed 850 nm AlGaAs LED emitter. This novel integration
scheme eliminates CTR degradation over time and temperature.
The emitter is optically coupled to an integrated photodetector/high-gain, high-speed output amplifier IC. The superior 15kV/µS
common-mode noise rejection is ensured through the use of an optically transparent noise shield.
The TTL compatible output has a totem-pole with a fan-out of 10. The CMOS compatible output has an open collector Schottky-
clamped transistor that interfaces to any CMOS logic between 4.5 and 15 volts. The 74OL6010/11 may also by used to drive power
MOSFETS or transistors up to 15 volts.
The Optologic coupler family typically offers propagation of delays of 60 ns and can support 15 MBaud data communication.
The two input chips and the output chip are assembled in a 6-pin DIP high insulation voltage plastic package. It provides a with-
stand test voltage of 5300 VRMS (1 minute).
FEATURES
• Industry first LSTTL to TTL and LSTTL to CMOS complete
logic-to-logic optocoupler
• Incorporates LED drive circuitry — use as logic gate
• Very high speed
• Choice of buffer or inverter
• Choice of TTL or CMOS compatible output up to 15 volts
• Fan-out of 10 TTL loads, fan-in 1 LSTTL load
• Internal noise shield — very high CMR of ±15 kV/µS
• UL recognized (File #E90700)
• Same noise immunity as LSTTL/TTL.
APPLICATIONS
• Transmission line interface — receiver and driver
• Excellent as bridged receiver in fast LAN highways
• Bus interface
• Logic family interface with ground loop noise elimination
• High speed AC/DC voltage sensing
• Driver for power semiconductor devices
• Level shifting
• Replaces fast pulse transformers
© 2003 Fairchild Semiconductor Corporation
Page 1 of 15
3/19/03

1 page




74OL6000 pdf
HIGH-SPEED
LOGIC-TO-LOGIC OPTOCOUPLERS
LSTTL TO
TTL BUFFER
TTL INVERTER
CMOS BUFFER
CMOS INVERTER
74OL6000
74OL6001
74OL6010
74OL6011
ELECTRICAL CHARACTERISTICS (TA = 0°C to 70°C Unless otherwise specified)
Parameter
Test Conditions
Symbol Min Typ* Max Units
74OL6010 74OL6011
74OL6010/11
Notes
CMOS OUTPUT 74OL6010/11
Input Supply Voltage
Output Supply Voltage
High-Level Input Voltage
Low-Level Input Voltage
Input Clamp Voltage
High-Level Input Current
Low-Level Input Current
Input Supply Current (high)
Input Supply Current (low)
VCCI
VCCO
VIH
VIL
VIK
IIH
IIL
ICCIH
ICCIL
Low-Level Output Voltage
VOL
High-Level Output Current
Low-Level Output Current
IOH
IOL
Output Supply Current (high) ICCOH
Output Supply Current (low)
ICCOL
*All typical values are at TA=25°C
4.5 5.0 5.5 V
4.5 15.0 V
2.0 V
0.8 V
-1.2 V
VCCI = 4.5 V, II = -18 mA
1.0 40.0 µA
VCCI = 5.5 V, VIH = 4.5 V
-200.0 -400.0 µA
VCCI = 5.5 V, VIL = -0.4 V
10.0 14.0 mA
VCCI = 5.5 V, VIN = VIH
10.0 14.0 mA
VCCI = 5.5 V, VIN = VIL
0.6
0.4
0.5
VCCI = 4.5 V, VCCO = 4.5 V,
V
VIN = 0.8V
VIN = 2.0V
IOL = 16 mA
VCCI = 4.5 V, VCCO = 4.5 V,
IOL = 4 mA
1.0 100.0 µA
VIN = VIH
VIN = VIL
VCCI = 4.5 V, VOH = 15 V,
VCCO = 4.5 - 15 V
16.0
mA
VIN = 0.8 V VIN = 2.0V
VCCI = 4.5 V, VOL = 0.6V,
VCCO = 4.5 - 15 V
9.0 12.0
mA VIN = VIH VIN = VIL
11.0 18.0
VCCI = 5.5 V, VO = VOH,
VCCO = 4.5 V
VCCI = 5.5 V, VO = VOL,
VCCO = 15 V
8.0 12.0
mA VIN = VIL VIN = VIH
11.0 18.0
VCCI = 5.5 V, VO = VOL,
VCCO = 4.5 V
VCCI = 5.5 V, VO = VOL,
VCCO = 15 V
1
1,3
1
1
1
1
1
1
1
1
1
1
1
1
SWITCHING CHARACTERISTCS (TA = 25°C Unless otherwise specified)
Parameter
Symbol Min Typ Max Units
Test Conditions
TTL OUTPUT 74OL6010/11
Propagation Delay Time For Output Low Level
Propagation Delay Time For Output High Level
Output Rise Time For Output High Level
Output Fail Time For Output Low Level
tPHL
tPLH
tr
tf
60 120
100 180
50
5
ns
ns
ns
ns
VCCI = 5 V,
VCCO = 5 V, RL = 470
Fig. Notes
15, 18
15, 18
15, 18
15, 18
1
1
1
1
© 2003 Fairchild Semiconductor Corporation
Page 5 of 15
3/19/03

5 Page





74OL6000 arduino
HIGH-SPEED
LOGIC-TO-LOGIC OPTOCOUPLERS
LSTTL TO
TTL BUFFER
TTL INVERTER
CMOS BUFFER
CMOS INVERTER
74OL6000
74OL6001
74OL6010
74OL6011
Package Dimensions (Through Hole)
PIN 1
ID.
0.270 (6.86)
0.240 (6.10)
0.070 (1.78)
0.045 (1.14)
0.350 (8.89)
0.330 (8.38)
0.200 (5.08)
0.115 (2.92)
0.154 (3.90)
0.100 (2.54)
0.022 (0.56)
0.016 (0.41)
0.100 (2.54)
TYP
0.020 (0.51)
MIN
0.016 (0.40)
0.008 (0.20)
0° to 15°
0.300 (7.62)
TYP
Package Dimensions (0.4” Lead Spacing)
PIN 1
ID.
0.270 (6.86)
0.240 (6.10)
0.350 (8.89)
0.330 (8.38)
0.070 (1.78)
0.045 (1.14)
0.200 (5.08)
0.135 (3.43)
0.154 (3.90)
0.100 (2.54)
0.022 (0.56)
0.016 (0.41)
0.004 (0.10)
MIN
0.100 (2.54) TYP
0.016 (0.40)
0.008 (0.20)
0° to 15°
0.400 (10.16)
TYP
NOTE
All dimensions are in inches (millimeters)
Package Dimensions (Surface Mount)
0.350 (8.89)
0.330 (8.38)
321
PIN 1
ID.
0.270 (6.86)
0.240 (6.10)
456
0.070 (1.78)
0.045 (1.14)
0.200 (5.08)
0.165 (4.18)
0.022 (0.56)
0.016 (0.41)
0.020 (0.51)
MIN
0.100 (2.54)
TYP
Lead Coplanarity : 0.004 (0.10) MAX
0.300 (7.62)
TYP
0.016 (0.40) MIN
0.315 (8.00)
MIN
0.405 (10.30)
MAX
0.016 (0.41)
0.008 (0.20)
Recommended Pad Layout for
Surface Mount Leadform
0.070 (1.78)
0.060 (1.52)
0.415 (10.54)
0.100 (2.54)
0.295 (7.49)
0.030 (0.76)
© 2003 Fairchild Semiconductor Corporation
Page 11 of 15
3/19/03

11 Page







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