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74LVX174M fiches techniques PDF

Fairchild Semiconductor - Low Voltage Hex D-Type Flip-Flop with Master Reset

Numéro de référence 74LVX174M
Description Low Voltage Hex D-Type Flip-Flop with Master Reset
Fabricant Fairchild Semiconductor 
Logo Fairchild Semiconductor 





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74LVX174M fiche technique
May 1993
Revised March 1999
74LVX174
Low Voltage Hex D-Type Flip-Flop with Master Reset
General Description
The LVX174 is a high-speed hex D flip-flop. The device is
used primarily as a 6-bit edge-triggered storage register.
The information on the D inputs is transferred to storage
during the LOW-to-HIGH clock transition. The device has a
Master Reset to simultaneously clear all flip-flops.
Features
s Input voltage level translation from 5V to 3V
s Ideal for low power/low noise 3.3V applications
s Guaranteed simultaneous switching noise level and
dynamic threshold performance
Ordering Code:
Order Number Package Number
Package Description
74LVX174M
M16A
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150” Narrow
74LVX174SJ
M16D
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74LVX174MTC
MTC16
16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbols
Connection Diagram
IEEE/IEC
Pin Descriptions
Pin Names
Description
D0–D5
CP
Data Inputs
Clock Pulse Input
MR Master Reset Input
Q0–Q5
Outputs
© 1999 Fairchild Semiconductor Corporation DS011607.prf
www.fairchildsemi.com

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