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PDF 74LVC240A Data sheet ( Hoja de datos )

Número de pieza 74LVC240A
Descripción Octal buffer/line driver
Fabricantes NXP Semiconductors 
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No Preview Available ! 74LVC240A Hoja de datos, Descripción, Manual

74LVC240A
Octal buffer/line driver with 5 V tolerant inputs/outputs;
inverting; 3-state
Rev. 8 — 29 November 2011
Product data sheet
1. General description
The 74LVC240A is an octal inverting buffer/line driver with 3-state outputs. The 3-state
outputs are controlled by the output enable inputs 1OE and 2OE. A HIGH on nOE causes
the outputs to assume a high-impedance OFF-state. Schmitt trigger action at all inputs
makes the circuit highly tolerant of slower input rise and fall times.
Inputs can be driven from either 3.3 V or 5 V devices. When disabled, up to 5.5 V can be
applied to the outputs. These features allow the use of these devices as translators in
mixed 3.3 V or 5 V applications.
The 74LVC240A is functionally identical to the 74LVC244A except that the 244 has
non-inverting outputs.
2. Features and benefits
5 V tolerant inputs for interlacing with 5 V logic
Supply voltage range from 1.2 V to 3.6 V
CMOS low power consumption
Direct interface with TTL levels
High-impedance when VCC = 0 V
Complies with JEDEC standard:
JESD8-7A (1.65 V to 1.95 V)
JESD8-5A (2.3 V to 2.7 V)
JESD8-C/JESD36 (2.7 V to 3.6 V)
ESD protection:
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115B exceeds 200 V
CDM JESD22-C101E exceeds 1000 V
Specified from 40 C to +85 C and 40 C to +125 C

1 page




74LVC240A pdf
NXP Semiconductors
74LVC240A
Octal buffer/line driver with 5 V tolerant inputs/outputs; inverting;
3-state
8. Recommended operating conditions
Table 5.
Symbol
VCC
VI
VO
Tamb
t/V
Recommended operating conditions
Parameter
Conditions
supply voltage
functional
input voltage
output voltage
output HIGH or LOW state
output 3-state
ambient temperature
in free air
input transition rise and fall VCC = 1.65 V to 2.7 V
rate VCC = 2.7 V to 3.6 V
9. Static characteristics
Min
1.65
1.2
0
0
0
40
0
0
Typ
-
-
-
-
-
-
-
-
Max
3.6
-
5.5
VCC
5.5
+125
20
10
Unit
V
V
V
V
V
C
ns/V
ns/V
Table 6. Static characteristics
At recommended operating conditions. Voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions
40 C to +85 C
40 C to +125 C Unit
Min Typ[1] Max Min Max
VIH HIGH-level VCC = 1.2 V
input voltage VCC = 1.65 V to 1.95 V
1.08
0.65 VCC
-
-
- 1.08 - V
- 0.65 VCC - V
VCC = 2.3 V to 2.7 V
1.7 -
-
1.7
-V
VCC = 2.7 V to 3.6 V
2.0 -
-
2.0
-V
VIL LOW-level VCC = 1.2 V
input voltage VCC = 1.65 V to 1.95 V
- - 0.12 - 0.12 V
- - 0.35 VCC - 0.35 VCC V
VCC = 2.3 V to 2.7 V
- - 0.7 - 0.7 V
VCC = 2.7 V to 3.6 V
- - 0.8 - 0.8 V
VOH HIGH-level VI = VIH or VIL
output
voltage
IO = 100 A;
VCC = 1.65 V to 3.6 V
VCC 0.2
-
- VCC 0.3 - V
IO = 4 mA; VCC = 1.65 V
1.2 -
-
1.05
-V
IO = 8 mA; VCC = 2.3 V
1.8 -
-
1.65
-V
IO = 12 mA; VCC = 2.7 V
2.2 -
-
2.05
-V
IO = 18 mA; VCC = 3.0 V
2.4 -
-
2.25
-V
IO = 24 mA; VCC = 3.0 V
2.2 -
-
2.0
-V
VOL LOW-level VI = VIH or VIL
output
voltage
IO = 100 A;
VCC = 1.65 V to 3.6 V
- - 0.2 - 0.3 V
IO = 4 mA; VCC = 1.65 V
- - 0.45 - 0.65 V
IO = 8 mA; VCC = 2.3 V
- - 0.6 - 0.8 V
IO = 12 mA; VCC = 2.7 V
- - 0.4 - 0.6 V
IO = 24 mA; VCC = 3.0 V
- - 0.55
-
0.8 V
II input leakage VCC = 3.6 V; VI = 5.5 V or GND - 0.1 5
current
- 20 A
74LVC240A
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 8 — 29 November 2011
© NXP B.V. 2011. All rights reserved.
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74LVC240A arduino
NXP Semiconductors
74LVC240A
Octal buffer/line driver with 5 V tolerant inputs/outputs; inverting;
3-state
SSOP20: plastic shrink small outline package; 20 leads; body width 5.3 mm
SOT339-1
D
y
Z
20
c
11
EA
X
HE v M A
pin 1 index
1
e
10
wM
bp
A2
A1
Q
(A3)
A
Lp
L
detail X
θ
0 2.5 5 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
A
max.
A1
A2
A3
bp
c D(1) E(1) e
HE
L
Lp
Q
v
w
y Z (1)
mm
2
0.21
0.05
1.80
1.65
0.25
0.38
0.25
0.20
0.09
7.4
7.0
5.4
5.2
0.65
7.9
7.6
1.25
1.03
0.63
0.9
0.7
0.2 0.13 0.1
0.9
0.5
Note
1. Plastic or metal protrusions of 0.2 mm maximum per side are not included.
θ
8o
0o
OUTLINE
VERSION
SOT339-1
IEC
REFERENCES
JEDEC
JEITA
MO-150
EUROPEAN
PROJECTION
ISSUE DATE
99-12-27
03-02-19
Fig 10. Package outline SOT339-1 (SSOP20)
74LVC240A
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 8 — 29 November 2011
© NXP B.V. 2011. All rights reserved.
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