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Numéro de référence | M48Z35AY | ||
Description | 256 Kbit 32Kb x8 ZEROPOWER SRAM | ||
Fabricant | ST Microelectronics | ||
Logo | |||
M48Z35AY
M48Z35AV
256 Kbit (32Kb x8) ZEROPOWER® SRAM
s INTEGRATED ULTRA LOW POWER SRAM,
POWER-FAIL CONTROL CIRCUIT and
BATTERY
s READ CYCLE TIME EQUALS WRITE CYCLE
TIME
s BATTERY LOW FLAG (BOK)
s AUTOMATIC POWER-FAIL CHIP DESELECT
and WRITE PROTECTION
s WRITE PROTECT VOLTAGES
(VPFD = Power-fail Deselect Voltage):
– M48Z35AY: 4.20V ≤ VPFD ≤ 4.50V
– M48Z35AV: 2.7V ≤ VPFD ≤ 3.0V
s SELF-CONTAINED BATTERY in the CAPHAT
DIP PACKAGE
s PACKAGING INCLUDES a 28-LEAD SOIC and
SNAPHAT® TOP
(to be Ordered Separately)
s SOIC PACKAGE PROVIDES DIRECT
CONNECTION for a SNAPHAT TOP which
CONTAINS the BATTERY and CRYSTAL
s PIN and FUNCTION COMPATIBLE with
JEDEC STANDARD 32K x8 SRAMs
DESCRIPTION
The M48Z35AY/35AV ZEROPOWER® RAM is a
32 Kbit x8 non-volatile static RAM that integrates
power-fail deselect circuitry and battery control
logic on a single die. The monolithic chip is avail-
able in two special packages to provide a highly in-
tegrated battery backed-up memory solution.
Table 1. Signal Names
A0-A14
Address Inputs
DQ0-DQ7
Data Inputs / Outputs
E Chip Enable
G Output Enable
W Write Enable
VCC Supply Voltage
VSS Ground
April 2000
SNAPHAT (SH)
Battery
28
1
SOH28 (MH)
28
1
PCDIP28 (PC)
Battery CAPHAT
Figure 1. Logic Diagram
VCC
15
A0-A14
8
DQ0-DQ7
W M48Z35AY
M48Z35AV
E
G
VSS
AI02781B
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Pages | Pages 16 | ||
Télécharger | [ M48Z35AY ] |
No | Description détaillée | Fabricant |
M48Z35AV | 256 Kbit (32 Kbit x 8) ZEROPOWER SRAM | ST Microelectronics |
M48Z35AY | 256 Kbit 32Kb x8 ZEROPOWER SRAM | ST Microelectronics |
US18650VTC5A | Lithium-Ion Battery | Sony |
TSPC106 | PCI Bus Bridge Memory Controller | ATMEL |
TP9380 | NPN SILICON RF POWER TRANSISTOR | Advanced Semiconductor |
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