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PDF M48Z32V Data sheet ( Hoja de datos )
| Número de pieza | M48Z32V | |
| Descripción | 256Kbit (32Kbit x 8) ZEROPOWER SRAM | |
| Fabricantes | ST Microelectronics | |
| Logotipo |  |
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M48Z32V
3.3V, 256Kbit (32Kbit x 8) ZEROPOWER® SRAM
Features
■ Integrated, ultra low power SRAM, and power-
fail control circuit
)■ READ cycle time equals WRITE cycle time
t(s■ Automatic power-fail chip deselect and WRITE
cprotection
du■ WRITE protect voltages:
ro(VPFD = Power-fail deselect voltage)
P )– M48Z32V: 2.7V ≤ VPFD ≤ 3.0V
te t(s■ Ultra-low standby current
le c■ RoHS COMPLIANT
OObbssoolleettee PPrroodduucctt((ss)) -- OObbssoolete Produ– Lead-free second level interconnect
44
1
SO44 (MT)
44-pin SOIC
November 2007
Rev 3
1/19
www.st.com
1
1 page  
M48Z32V
1 Summary
Summary
The M48Z32V ZEROPOWER® RAM is a 32K x 8, non-volatile static RAM that integrates
power-fail deselect circuitry and battery control logic on a single die.
The 44-pin, 330mil SOIC provides a battery pin for an external, user-supplied battery. This is
all that is required to fully non-volatize the SRAM.
Figure 1. Logic diagram
VCC B +
t(s)15
cA0-A14
8
DQ0-DQ7
roduW M48Z32V
te P t(s)E
ole ucG
OObbssoolleettee PPrroodduucctt((ss)) -- OObbssolete ProdTable 1.
Signal names
A0-A14
DQ0-DQ7
E
G
W
VCC
VSS
B+
NC
VSS
AI04787
Address inputs
Data inputs / outputs
Chip enable input
Output enable input
WRITE enable input
Supply voltage
Ground
Positive battery pin
Not connected
5/19
5 Page 
M48Z32V
Operating modes
2.4 VCC noise and negative going transients
ICC transients, including those produced by output switching, can produce voltage
fluctuations, resulting in spikes on the VCC bus. These transients can be reduced if
capacitors are used to store energy which stabilizes the VCC bus. The energy stored in the
bypass capacitors will be released as low going spikes are generated or energy will be
absorbed when overshoots occur. A ceramic bypass capacitor value of 0.1µF (see Figure 7)
is recommended in order to provide the needed filtering.
In addition to transients that are caused by normal SRAM operation, power cycling can
generate negative voltage spikes on VCC that drive it to values below VSS by as much as
one volt. These negative spikes can cause data corruption in the SRAM while in battery
backup mode. To protect from these voltage spikes, ST recommends connecting a schottky
)diode from VCC to VSS (cathode connected to VCC, anode to VSS). (Schottky diode 1N5817
t(sis recommended for through hole and MBRS120T3 is recommended for surface mount).
ucFigure 7. Supply voltage protection
Prod )VCC
VCC
olete uct(s0.1μF
DEVICE
Obs ProdVSS
OObbssoolleettee PPrroodduucctt((ss)) -- ObsoleteAI02169
11/19
11 Page | ||
| Páginas | Total 19 Páginas | |
| PDF Descargar | [ Datasheet M48Z32V.PDF ] | |
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