|
|
Número de pieza | M48Z2M1 | |
Descripción | 16 Mb 2Mb x 8 ZEROPOWER SRAM | |
Fabricantes | ST Microelectronics | |
Logotipo | ||
Hay una vista previa y un enlace de descarga de M48Z2M1 (archivo pdf) en la parte inferior de esta página. Total 12 Páginas | ||
No Preview Available ! M48Z2M1
M48Z2M1Y
16 Mb (2Mb x 8) ZEROPOWER® SRAM
INTEGRATED LOW POWER SRAM,
POWER-FAIL CONTROL CIRCUIT and
BATTERIES
CONVENTIONAL SRAM OPERATION;
UNLIMITED WRITE CYCLES
10 YEARS of DATA RETENTION in the
ABSENCE of POWER
AUTOMATIC POWER-FAIL CHIP DESELECT
and WRITE PROTECTION
WRITE PROTECT VOLTAGES
(VPFD = Power-fail Deselect Voltage):
– M48Z2M1: 4.5V ≤ VPFD ≤ 4.75V
– M48Z2M1Y: 4.2V ≤ VPFD ≤ 4.50V
BATTERIES ARE INTERNALLY ISOLATED
UNTIL POWER IS APPLIED
PIN and FUNCTION COMPATIBLE with
JEDEC STANDARD 2Mb x 8 SRAMs
36
1
PMLDIP36 (PL)
Module
Figure 1. Logic Diagram
DESCRIPTION
The M48Z2M1/2M1Y ZEROPOWER® RAM is a
non-volatile 16,777,216 bit Static RAM organized
as 2,097,152 words by 8 bits. The device combines
two internal lithium batteries, CMOS SRAMs and a
control circuit in a plastic 36 pin DIP long Module.
The ZEROPOWER RAM replaces industry stand-
ard SRAMs. It provides the nonvolatility of PROMs
without any requirement for special write timing or
limitations on the number of writes that can be
performed.
Table 1. Signal Names
A0-A20
Address Inputs
DQ0-DQ7
Data Inputs / Outputs
E Chip Enable
G Output Enable
W Write Enable
VCC Supply Voltage
VSS Ground
VCC
21
A0-A20
8
DQ0-DQ7
W M48Z2M1
M48Z2M1Y
E
G
VSS
AI02048
January 1998
This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice.
1/12
1 page M48Z2M1, M48Z2M1Y
Table 8. Power Down/Up Mode AC Characteristics
(TA = 0 to 70°C)
Symbol
Parameter
Min Max Unit
tF (1)
tFB (2)
VPFD (max) to VPFD (min) VCC Fall Time
VPFD (min) to VSO VCC Fall Time
300 µs
10 µs
tWP Write Protect Time from VCC = VPFD
40 150 µs
tR VSO to VPFD (max) VCC Rise Time
0 µs
tER E Recovery Time
40 120 ms
Notes: 1. VPFD (max) to VPFD (min) fall time of less than tF may result in deselection/write protection not occurring until 200 µs after
VCC passes VPFD (min).
2. VPFD (min) to VSO fall time of less than tFB may cause corruption of RAM data.
Figure 5. Power Down/Up Mode AC Waveforms
VCC
VPFD (max)
VPFD (min)
VSO
E
tF
tWP
RECOGNIZED
tFB
OUTPUTS
VALID
(PER CONTROL INPUT)
tDR
DON'T CARE
HIGH-Z
tR
tER
RECOGNIZED
VALID
(PER CONTROL INPUT)
AI01031
5/12
5 Page Symb
A
A1
B
C
D
E
e1
e3
eA
L
S
N
PMLDIP36
M48Z2M1, M48Z2M1Y
PMLDIP36 - 36 pin Plastic DIP Long Module
mm inches
Typ Min Max Typ Min
9.27 9.52
0.365
0.38 –
0.015
0.43 0.59
0.017
0.20 0.33
0.008
52.58
53.34
2.070
18.03
18.80
0.710
2.30 2.81
0.090
38.86
47.50
1.530
14.99
16.00
0.590
3.05 3.81
0.120
4.45 5.33
0.175
36 36
Max
0.375
–
0.023
0.013
2.100
0.740
0.110
1.870
0.630
0.150
0.210
S
N
B
e3
D
1
A
A1 L
e1
E
Drawing is not to scale.
C
eA
PMDIP
11/12
11 Page |
Páginas | Total 12 Páginas | |
PDF Descargar | [ Datasheet M48Z2M1.PDF ] |
Número de pieza | Descripción | Fabricantes |
M48Z2M1 | 16 Mb 2Mb x 8 ZEROPOWER SRAM | ST Microelectronics |
M48Z2M1V | 16 Mbit (2 Mb x 8) ZEROPOWER SRAM | STMicroelectronics |
M48Z2M1Y | 16 Mbit (2 Mb x 8) ZEROPOWER SRAM | ST Microelectronics |
Número de pieza | Descripción | Fabricantes |
SLA6805M | High Voltage 3 phase Motor Driver IC. |
Sanken |
SDC1742 | 12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters. |
Analog Devices |
DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares, |
DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar |