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Numéro de référence | M48Z129Y | ||
Description | 3.3V/5V 1 Mbit 128Kb x8 ZEROPOWER SRAM | ||
Fabricant | ST Microelectronics | ||
Logo | |||
M48Z129Y
M48Z129V
3.3V/5V 1 Mbit (128Kb x8) ZEROPOWER® SRAM
s INTEGRATED ULTRA LOW POWER SRAM,
POWER-FAIL CONTROL CIRCUIT, and
BATTERY
s AUTOMATIC POWER-FAIL CHIP DESELECT
AND WRITE PROTECTION
s MICROPROCESSOR POWER-ON RESET
(RESET VALID EVEN DURING BATTERY
BACK-UP MODE)
s BATTERY LOW PIN - PROVIDES WARNING
OF BATTERY END-OF-LIFE
s WRITE PROTECT VOLTAGES
(VPFD = Power-fail Deselect Voltage):
– M48Z129Y: 4.2V ≤ VPFD ≤ 4.5V
– M48Z129V: 2.7V ≤ VPFD ≤ 3.0V
s CONVENTIONAL SRAM OPERATION;
UNLIMITED WRITE CYCLES
s 10 YEARS OF DATA RETENTION IN THE
ABSENCE OF POWER
s PIN AND FUNCTION COMPATIBLE WITH
JEDEC STANDARD 128Kb x 8 SRAMS
s SELF CONTAINED BATTERY IN DIP
PACKAGE
Table 1. Signal Names
A0-A16
Address Inputs
DQ0-DQ7
Data Inputs / Outputs
E Chip Enable
G Output Enable
W Write Enable
RST
Reset Output (Open Drain)
BL
Battery Low Output (Open
Drain)
VCC Supply Voltage
VSS Ground
32
1
PMDIP32 (PM)
Module
Figure 1. Logic Diagram
VCC
17
A0-A16
W M48Z129Y
M48Z129V
E
G
8
DQ0-DQ7
RST
BL
VSS
AI02309
June 2000
1/13
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Pages | Pages 13 | ||
Télécharger | [ M48Z129Y ] |
No | Description détaillée | Fabricant |
M48Z129V | 1 Mbit (128 Kb x 8) ZEROPOWER SRAM | ST Microelectronics |
M48Z129Y | 3.3V/5V 1 Mbit 128Kb x8 ZEROPOWER SRAM | ST Microelectronics |
US18650VTC5A | Lithium-Ion Battery | Sony |
TSPC106 | PCI Bus Bridge Memory Controller | ATMEL |
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