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PDF MAX1011 Data sheet ( Hoja de datos )
| Número de pieza | MAX1011 | |
| Descripción | Low-Power / 90Msps / 6-Bit ADC | |
| Fabricantes | Maxim Integrated | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de MAX1011 (archivo pdf) en la parte inferior de esta página. Total 12 Páginas | ||
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19-1335; Rev 0a; 2/98
EVAALVUAAILTAIOBNLEKIT
Low-Power, 90Msps, 6-Bit ADC
General Description
The MAX1011 is a 6-bit analog-to-digital converter
(ADC) that combines high-speed, low-power operation
with a user-selectable input range, an internal refer-
ence, and a clock oscillator. The ADC converts analog
signals into binary-coded digital outputs at sampling
rates up to 90Msps. The ability to directly interface with
baseband signals makes the MAX1011 ideal for use in
a wide range of communications and instrumentation
applications.
The MAX1011’s input amplifier features a true differential
input, a -0.5dB analog bandwidth of 55MHz, and a user-
programmable input full-scale range of 125mVp-p,
250mVp-p, or 500mVp-p. With an AC-coupled signal,
input offset is typically less than 1/4LSB. Dynamic per-
formance is 5.85 effective number of bits (ENOB) with a
20MHz analog input signal, or 5.7 ENOB with a 50MHz
signal.
The MAX1011 operates with +5V analog and +3.3V digi-
tal supplies for easy interfacing to +3.3V-logic-compatible
digital signal processors and microprocessors. It comes
in a 24-pin QSOP package.
Applications
IF Sampling Receivers
VSAT Receivers
Wide Local Area Networks (WLANs)
Instrumentation
Features
o High Sampling Rate: 90Msps
o Low Power Dissipation: 215mW
o Excellent Dynamic Performance:
5.85 ENOB with 20MHz Analog Input
5.7 ENOB with 50MHz Analog Input
o ±1/4LSB INL and DNL (typ)
o ±1/4LSB Input Offset (typ)
o Internal Bandgap Voltage Reference
o Internal Oscillator with Overdrive Capability
o 55MHz (-0.5dB) Bandwidth Input Amplifier with
True Differential Input
o User-Selectable Full-Scale Range
(125mVp-p, 250mVp-p, or 500mVp-p)
o Single-Ended or Differential Input Drive
o Flexible, 3.3V, CMOS-Compatible Digital Outputs
PART
MAX1011CEG
Ordering Information
TEMP. RANGE
0°C to +70°C
PIN-PACKAGE
24 QSOP
Pin Configuration appears at end of data sheet.
Functional Diagram
OCC+
OCC-
IN+
IN-
GAIN
INPUT
AMP
OFFSET
CORREC-
TION
MAX1011
ADC
VREF
BANDGAP
REFERENCE
6 DATA
BUFFER
CLOCK
DRIVER
6
CLOCK
OUT
D0–D5
DCLK
TNK+
TNK-
________________________________________________________________ Maxim Integrated Products 1
For free samples & the latest literature: http://www.maxim-ic.com, or phone 1-800-998-8800
For small orders, phone 408-737-7600 ext. 3468.
1 page  
Low-Power, 90Msps, 6-Bit ADC
PIN
1
2
3
4
5
6
7
8
9, 10,
12, 13
11
14
15
16
17
18
19–24
NAME
GAIN
OCC+
OCC-
IN+
IN-
VCC
TNK+
TNK-
GND
VCC
VCC
N.C.
OGND
VCCO
DCLK
D0–D5
Pin Description
FUNCTION
Gain-Select Input. Sets input full-scale range: 125/250/500mVp-p (Table 1).
Positive Offset-Correction Compensation. Connect a 0.22µF capacitor for AC-coupled inputs. Ground
pin 2 for DC-coupled inputs.
Negative Offset-Correction Compensation. Connect a 0.22µF capacitor for AC-coupled inputs. Ground
pin 3 for DC-coupled inputs.
Noninverting Analog Input
Inverting Analog Input
+5V ±5% Supply. Bypass with a 0.01µF capacitor to GND (pin 9).
Positive Oscillator/Clock Input
Negative Oscillator/Clock Input
Analog Ground
+5V ±5% Supply. Bypass with a 0.01µF capacitor to GND (pin 10).
+5V ±5% Supply. Bypass with a 0.01µF capacitor to GND (pin 13).
No Connection
Digital Output Ground
Digital Output Supply, +3.3V ±300mV. Bypass with a 47pF capacitor to OGND (pin 16).
Digital Clock Output. Frames the output data.
Digital Outputs 0–5. D5 is the most significant bit (MSB).
_______________Detailed Description
Converter Operation
The MAX1011 integrates a 6-bit analog-to-digital con-
verter (ADC), a buffered voltage reference, and oscilla-
tor circuitry. The ADC uses a flash conversion technique
to convert an analog input signal into a 6-bit parallel
digital output code. The MAX1011’s unique design
includes 63 fully differential comparators and a propri-
etary encoding scheme that ensures no more than
1LSB dynamic encoding error. The control logic inter-
faces easily to most digital signal processors (DSPs)
and microprocessors (µPs) with +3.3V CMOS-compati-
ble logic interfaces. Figure 1 shows the MAX1011 in a
typical application.
Programmable Input Amplifier
The MAX1011 has a programmable-gain input amplifier
with a -0.5dB bandwidth of 55MHz and a true differen-
tial input. To maximize performance in high-speed
systems, the amplifier has less than 3pF of input
capacitance. The input amplifier gain is programmed
via the GAIN pin to provide three possible input full-
scale ranges (FSRs) as shown in Table 1.
Single-ended and differential AC-coupled input circuit
examples are shown in Figures 2 and 3. Each of the
Table 1. Input Amplifier Programming
GAIN
GND
Open
VCC
INPUT FULL-SCALE RANGE
(mVp-p)
500
250
125
_______________________________________________________________________________________ 5
5 Page 
Low-Power, 90Msps, 6-Bit ADC
Package Information
______________________________________________________________________________________ 11
11 Page | ||
| Páginas | Total 12 Páginas | |
| PDF Descargar | [ Datasheet MAX1011.PDF ] | |
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