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PDF MAT02 Data sheet ( Hoja de datos )
| Número de pieza | MAT02 | |
| Descripción | Low Noise / Matched Dual Monolithic Transistor | |
| Fabricantes | Analog Devices | |
| Logotipo |  |
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FEATURES
Low Offset Voltage: 50 V max
Low Noise Voltage at 100 Hz, 1 mA: 1.0 nV/√Hz max
High Gain (hFE): 500 min at IC = 1 mA
300 min at IC = 1 A
Excellent Log Conformance: rBE Ӎ 0.3 ⍀
Low Offset Voltage Drift: 0.1 V/؇C max
Improved Direct Replacement for LM194/394
Available in Die Form
Low Noise, Matched
Dual Monolithic Transistor
MAT02
PIN CONNECTION
TO-78
(H Suffix)
PRODUCT DESCRIPTION
The design of the MAT02 series of NPN dual monolithic tran-
sistors is optimized for very low noise, low drift, and low rBE.
Precision Monolithics’ exclusive Silicon Nitride “Triple-
Passivation” process stabilizes the critical device parameters
over wide ranges of temperature and elapsed time. Also, the high
current gain (hFE) of the MAT02 is maintained over a wide
range of collector current. Exceptional characteristics of the
MAT02 include offset voltage of 50 µV max (A/E grades) and
150 µV max F grade. Device performance is specified over the
full military temperature range as well as at 25°C.
Input protection diodes are provided across the emitter-base
junctions to prevent degradation of the device characteristics
due to reverse-biased emitter current. The substrate is clamped
to the most negative emitter by the parasitic isolation junction
created by the protection diodes. This results in complete isola-
tion between the transistors.
The MAT02 should be used in any application where low noise
is a priority. The MAT02 can be used as an input stage to make
an amplifier with noise voltage of less than 1.0 nV/√Hz at 100 Hz.
Other applications, such as log/antilog circuits, may use the ex-
cellent logging conformity of the MAT02. Typical bulk resis-
tance is only 0.3 Ω to 0.4 Ω. The MAT02 electrical charac-
teristics approach those of an ideal transistor when operated over
a collector current range of 1 µA to 10 mA. For applications re-
quiring multiple devices see MAT04 Quad Matched Transistor
data sheet.
REV. C
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
NOTE
Substrate is connected to case on TO-78 package. Sub-
strate is normally connected to the most negative circuit
potential, but can be floated.
ABSOLUTE MAXIMUM RATINGS1
Collector-Base Voltage (BVCBO) . . . . . . . . . . . . . . . . . . . . 40 V
Collector-Emitter Voltage (BVCEO) . . . . . . . . . . . . . . . . . . 40 V
Collector-Collector Voltage (BVCC) . . . . . . . . . . . . . . . . . . 40 V
Emitter-Emitter Voltage (BVEE) . . . . . . . . . . . . . . . . . . . . . 40 V
Collector Current (IC) . . . . . . . . . . . . . . . . . . . . . . . . . . 20 mA
Emitter Current (IE) . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 mA
Total Power Dissipation
Case Temperature ≤ 40°C2 . . . . . . . . . . . . . . . . . . . . . 1.8 W
Ambient Temperature ≤ 70°C3 . . . . . . . . . . . . . . . . 500 mW
Operating Temperature Range
MAT02A . . . . . . . . . . . . . . . . . . . . . . . . . . –55°C to +125°C
MAT02E, F . . . . . . . . . . . . . . . . . . . . . . . . . –25°C to +85°C
Operating Junction Temperature . . . . . . . . . . –55°C to +150°C
Storage Temperature . . . . . . . . . . . . . . . . . . . –65°C to +150°C
Lead Temperature (Soldering, 60 sec) . . . . . . . . . . . . . +300°C
Junction Temperature . . . . . . . . . . . . . . . . . . –65°C to +150°C
NOTES
1Absolute maximum ratings apply to both DICE and packaged devices.
2Rating applies to applications using heat sinking to control case temperature.
Derate linearly at 16.4 mW/°C for case temperature above 40°C.
3Rating applies to applications not using a heat sinking; devices in free air only.
Derate linearly at 6.3 mW/°C for ambient temperature above 70°C.
ORDERING GUIDE1
Model
MAT02AH2
MAT02EH
MAT02FH
VOS max
Temperature
(TA = +25؇C) Range
50 µV
50 µV
150 µV
–55°C to +125°C
–55°C to +125°C
–55°C to +125°C
Package
Option
TO-78
TO-78
TO-78
NOTES
1Burn-in is available on commercial and industrial temperature range parts in
TO-can packages.
2For devices processed in total compliance to MIL-STD-883, add /883 after part
number. Consult factory for 883 data sheet.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 617/329-4700
Fax: 617/326-8703
1 page  
MAT02
Figure 1. Current Gain vs.
Collector Current
Figure 2. Current Gain
vs. Temperature
Figure 3. Gain Bandwidth
vs. Collector Current
Figure 4. Base-Emitter-On
Voltage vs. Collector Current
Figure 5. Small Signal Input
Resistance vs. Collector Current
Figure 6. Small-Signal Output
Conductance vs. Collector Current
Figure 7. Saturation Voltage
vs. Collector Current
Figure 8. Noise Voltage
Density vs. Frequency
Figure 9. Noise Voltage Density
vs. Collector Current
REV. C
–5–
5 Page 
Substituting in the voltage relationships and simplifying leads
to:
VO
=
RO
R1
VY
VVXZ
m
,
where
(20)
RB + KRA
m = RB + (1 – K ) RA
The factor “K” is a potentiometer position and varies from zero
to 1.0, so “m” ranges from RB/(RA + RB) to (RB + RA)/RB.
Practical values are 125 Ω for RB and 500 Ω for RA; these val-
ues will provide an adjustment range of 0.2 to 5.0. A value of
100 kΩ is recommended for the R1 resistors assuming a full-
scale input range of 10 V. As with the one-quadrant multiplier/
divider circuit previously discussed, the VX, VY, and VZ inputs
must all be positive.
The op amps should have the lowest possible input offsets. The
OP07 is recommended for most applications, although such
programmable micropower op amps as the OP22 or OP32 offer
advantages in low-power or single-supply circuits. The micro-
power op amps also have very low input bias-current drift, an
important advantage in log/antilog circuits. External offset null-
ing may be needed, particularly for applications requiring a
wide dynamic range. Frequency compensating capacitors, on
the order of 50 pF, may be required for A2 and A3. Amplifier
A1 is likely to need a larger capacitor, typically 0.0047 µF, to as-
sure stability.
MAT02
Accuracy is limited at the higher input levels by bulk emitter re-
sistance, but this is much lower for the MAT02 than for other
transistor pairs. Accuracy at the lower signal levels primarily de-
pends on the op amp offsets. Accuracies of better than 1% are
readily achievable with this circuit configuration and can be bet-
ter than ± 0.1% over a limited operating range.
FAST LOGARITHMIC AMPLIFIER
The circuit of Figure 23 is a modification of a standard logarith-
mic amplifier configuration. Running the MAT02 at 2.5 mA per
side (full-scale) allows a fast response with wide dynamic range.
The circuit has a 7 decade current range, a 5 decade voltage
range, and is capable of 2.5 µs settling time to 1% with a 1 V to
10 V step.
The output follows the equation:
VO
=
R3 + R2 kT In V REF
R2 q V IN
(21)
The output is inverted with respect to the input, and is nomi-
nally –1 V/decade using the component values indicated.
LOW-NOISE ؋1000 AMPLIFIER
The MAT02 noise voltage is exceptionally low, only 1 nV/√Hz
at 10 Hz when operated over a collector-current range of 1 mA
to 4 mA. A single-ended ×1000 amplifier that takes advantage of
this low MAT02 noise level is shown in Figure 24. In addition
to low noise, the amplifier has very low drift and high CMRR.
An OP32 programmable low-power op amp is used for the sec-
ond stage to obtain good speed with minimal power consump-
tion. Small-signal bandwidth is 1 MHz, slew rate is 2.4 V/µs,
and total supply current is approximately 2.8 mA.
REV. C
Figure 22. Multifunction Converter
–11–
11 Page | ||
| Páginas | Total 12 Páginas | |
| PDF Descargar | [ Datasheet MAT02.PDF ] | |
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