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PDF MACH215-12JC Data sheet ( Hoja de datos )
| Número de pieza | MACH215-12JC | |
| Descripción | High-Density EE CMOS Programmable Logic | |
| Fabricantes | Lattice | |
| Logotipo |  |
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FINAL
COM’L: -12/15/20
IND: -14/18/24
MACH215-12/15/20
High-Density EE CMOS Programmable Logic
Lattice Semiconductor
DISTINCTIVE CHARACTERISTICS
s 44 Pins
s 32 Output Macrocells
s 32 Input Macrocells
s Product terms for:
— Individual flip-flop clock
— Individual asynchronous reset, preset
— Individual output enable
s 12 ns tPD Commercial
14.5 ns tPD Industrial
s 67 MHz fCNT
s 38 Inputs with pull-up resistors
s 32 Outputs
s 64 Flip-flops
s For asynchronous and synchronous
applications
s 4 “PAL22RA8” blocks with buried macrocells
s Pin-compatible with MACH110, MACH111,
MACH210, and MACH211
GENERAL DESCRIPTION
The MACH215 is a member of the high-performance
EE CMOS MACH device family. This device has
approximately three times the capability of the popular
PAL20RA10 without loss of speed. This device is
designed for use in asynchronous as well as synchro-
nous applications.
The MACH215 consists of four PAL blocks intercon-
nected by a programmable switch matrix. The four PAL
blocks are essentially “PAL22RA8” structures complete
with product-term arrays and programmable macro-
cells, individual register control product terms, and input
registers. The switch matrix connects the PAL blocks to
each other and to all input pins, providing a high degree
of connectivity between the fully-connected PAL blocks.
This allows designs to be placed and routed efficiently.
The MACH215 has two kinds of macrocell: output and
input. The MACH215 output macrocell provides regis-
tered, latched, or combinatorial outputs with program-
mable polarity. If a registered configuration is chosen,
the register can be configured as D-type or T-type to
help reduce the number of product terms. The register
type decision can be made by the designer or by the
software. Each macrocell has its own dedicated clock,
asynchronous reset, and asynchronous preset control.
The polarity of the clock signal is programmable. All
output macrocells can be connected to an I/O cell.
The MACH215 has dedicated input macrocells which
provide input registers or latches for synchronizing input
signals and reducing setup time requirements.
Publication# 16751 Rev. E
Issue Date: May 1995
Amendment/0
1 page  
ORDERING INFORMATION
Industrial Products
Programmable logic products for industrial applications are available with several ordering options. The order number (Valid
Combination) is formed by a combination of:
MACH 215 -14 J I
FAMILY TYPE
MACH = Macro Array CMOS High-Speed
DEVICE NUMBER
215 = 32 Asynchronous Output Macrocells, 44 Pins
SPEED
-14 = 14.5 ns tPD
-18 = 18 ns tPD
-24 = 24 ns tPD
OPTIONAL PROCESSING
Blank = Standard Processing
OPERATING CONDITIONS
I = Industrial (–40°C to +85°C)
PACKAGE TYPE
J = 44-Pin Plastic Leaded Chip
Carrier (PL 044)
Valid Combinations
MACH215-14
MACH215-18
MACH215-24
JI
Valid Combinations
The Valid Combinations table lists configurations
planned to be supported in volume for this device.
Consult your local sales office to confirm availabil-
ity of specific valid combinations and to check on newly
released combinations.
MACH215-14/18/24 (Ind)
5
5 Page 
CLK0
CLK1
AP
D/L Q
From I/O Pin
To
Switch
Matrix
16751E-7
Figure 5. Input Macrocell
From I/O Cell
CLK0
CLK1
DQ
To Switch
Matrix
a. Input Register
CLK0
CLK1
LQ
G
To Switch
Matrix
b. Input Latch
Figure 6. Input Macrocell Configurations
From I/O Cell
16751E-8
Individual
Output Enable
Product Term
From Output
Macrocell
To Switch
Matrix
Figure 7. I/O Cell
MACH215-12/15/20
To Input
Macrocell
16751E-9
11
11 Page | ||
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| PDF Descargar | [ Datasheet MACH215-12JC.PDF ] | |
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