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PDF IDT54FCT646DB Data sheet ( Hoja de datos )

Número de pieza IDT54FCT646DB
Descripción FAST CMOS OCTAL TRANSCEIVER/REGISTER
Fabricantes Integrated Device 
Logotipo Integrated Device Logotipo



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®
Integrated Device Technology, Inc.
FAST CMOS OCTAL
TRANSCEIVER/REGISTER
IDT54/74FCT646
IDT54/74FCT646A
IDT54/74FCT646C
FEATURES:
• IDT54/74FCT646 equivalent to FASTspeed;
IDT54/74FCT646A 30% faster than FAST
IDT54/74FCT646C 40% faster than FAST
• Independent registers for A and B buses
• Multiplexed real-time and stored data
• IOL = 64mA (commercial) and 48mA (military)
• CMOS power levels (1mW typical static)
• TTL input and output level compatible
• CMOS output level compatible
• Available in 24-pin (300 mil) CERDIP, plastic DIP, SOIC,
CERPACK and 28-pin LCC
• Product available in Radiation Tolerant and Radiation
Enhanced Versions
• Military product compliant to MIL-STD-883, Class B
DESCRIPTION:
The IDT54/74FCT646/A/C consists of a bus transceiver
with 3-state D-type flip-flops and control circuitry arranged for
multiplexed transmission of data directly from the data bus or
from the internal storage registers.
GThe IDT54/74FCT646/A/C utilizes the enable control ( )
and direction (DIR) pins to control the transceiver functions.
SAB and SBA control pins are provided to select either real
time or stored data transfer. The circuitry used for select
control will eliminate the typical decoding glitch that occurs in
a multiplexer during the transition between stored and real-
time data. A LOW input level selects real-time data and a
HIGH selects stored data.
Data on the A or B data bus or both can be stored in the
internal D flip flops by LOW-to-HIGH transitions at the
appropriate clock pins (CPAB or CPBA) regardless of the
select or enable control pins.
FUNCTIONAL BLOCK DIAGRAM
G
DIR
CPBA
SBA
CPAB
SAB
1 OF 8 CHANNELS
A 1 A REG
1D
C1
B REG
1D
C1
B1
TO 7 OTHER CHANNELS
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
FAST is a registered trademark of National Semiconductor Co.
MILITARY AND COMMERCIAL TEMPERATURE RANGES
©1992 Integrated Device Technology, Inc.
7.18
2536 drw 01
MAY 1992
DSC-4626/2
1

1 page




IDT54FCT646DB pdf
IDT54/74FCT646/A/C
FAST CMOS OCTAL TRANSCEIVER/REGISTER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
POWER SUPPLY CHARACTERISTICS
VLC = 0.2V; VHC = VCC – 0.2V
Symbol
Parameter
Test Conditions(1)
ICC Quiescent Power Supply Current VCC = Max.
VIN VHC; VIN VLC
ICC
ICCD
IC
Quiescent Power Supply Current
TTL Inputs HIGH
Dynamic Power Supply Current(4)
Total Power Supply Current(6)
VCC = Max.
VIN = 3.4V(3)
VCC = Max.
Outputs Open
G = DIR = GND
One Input Toggling
50% Duty Cycle
VCC = Max.
Outputs Open
fCP = 10MHz
50% Duty Cycle
G = DIR = GND
One Bit Toggling
at fi = 5MHz
50% Duty Cycle
VIN VHC
VIN VLC
VIN VHC
VIN VLC
(FCT)
VIN = 3.4V
VIN = GND
VCC = Max.
Outputs Open
fCP = 10MHz
50% Duty Cycle
G = DIR = GND
Eight Bits Toggling
at fi = 5MHz
50% Duty Cycle
VIN VHC
VIN VLC
(FCT)
VIN = 3.4V
VIN = GND
Min.
Typ.(2)
0.2
Max.
1.5
Unit
mA
— 0.5 2.0 mA
— 0.15 0.25 mA/MHz
— 1.7 4.0 mA
— 2.2 6.0
— 7.0 12.8(5)
— 9.2 21.8(5)
NOTES:
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at VCC = 5.0V, +25°C ambient.
3. Per TTL driven input (VIN = 3.4V); all other inputs at VCC or GND.
4. This parameter is not directly testable, but is derived for use in Total Power Supply calculations.
5. Values for these conditions are examples of the ICC formula. These limits are guaranteed but not tested.
6. IC = IQUIESCENT + IINPUTS + IDYNAMIC
IC = ICC + ICC DHNT + ICCD (fCP/2 + fiNi)
ICC = Quiescent Current
ICC = Power Supply Current for a TTL High Input (VIN = 3.4V)
DH = Duty Cycle for TTL Inputs High
NT = Number of TTL Inputs at DH
ICCD = Dynamic Current Caused by an Output Transition Pair (HLH or LHL)
fCP = Clock Frequency for Register Devices (Zero for Non-Register Devices)
fi = Input Frequency
Ni = Number of Inputs at fi
All currents are in milliamps and all frequencies are in megahertz.
2536 tbl 06
7.18 5

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