|
|
PDF M68300 Data sheet ( Hoja de datos )
| Número de pieza | M68300 | |
| Descripción | QUad Integrated Communications Controller Users Manual | |
| Fabricantes | Motorola Inc | |
| Logotipo |  |
|
Hay una vista previa y un enlace de descarga de M68300 (archivo pdf) en la parte inferior de esta página. Total 30 Páginas | ||
|
No Preview Available !
MOTOROLA
MC68360
QUad Integrated
Communications Controller
User’s Manual
Motorola reserves the right to make changes without further notice to any products herein to improve reliability, function or design. Motorola does not assume any
liability arising out of the application or use of any product or circuit described herein; neither does it convey any license under its patent rights nor the rights of
others. Motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other
applications intended to support or sustain life, or for any other application in which the failure of the Motorola product could create a situation where personal
injury or death may occur. Should Buyer purchase or use Motorola products for any such unintended or unauthorized application, Buyer shall indemnify and hold
Motorola and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney
fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that
Motorola was negligent regarding the design or manufacture of the part. Motorola and the are registered trademarks of Motorola, Inc. Motorola, Inc. is an
Equal Opportunity/Affirmative Action Employer.
1 page  
Paragraph
Number
Title
Table of Contents
Page
Number
1.1
1.2
1.2.1
1.2.2
1.2.3
1.3
1.3.1
1.3.2
1.3.3
1.4
1.5
1.6
1.7
2.1
2.1.1
2.1.1.1
2.1.1.2
2.1.2
2.1.3
2.1.3.1
2.1.3.2
2.1.4
2.1.4.1
2.1.4.2
2.1.4.3
2.1.4.4
2.1.5
2.1.5.1
2.1.5.2
2-6
2.1.5.3
1).
2.1.5.4
2.1.6
2.1.7
2.1.7.1
2.1.7.2
2.1.7.3
2.1.7.4
Section 1
Introduction
QUICC Key Features .............................................................................. 1-1
QUICC Architecture Overview................................................................. 1-4
CPU32+ Core.......................................................................................... 1-5
System Integration Module (SIM60)........................................................ 1-5
Communications Processor Module (CPM) ............................................ 1-6
Upgrading Designs from the MC68302 ................................................... 1-6
Architectural Approach ............................................................................ 1-6
Hardware Compatibility Issues................................................................ 1-7
Software Compatibility Issues ................................................................. 1-7
QUICC Glueless System Design............................................................. 1-8
QUICC Serial Configurations .................................................................. 1-9
QUICC Serial Configuration Examples ................................................. 1-16
QUICC System Bus Configurations ...................................................... 1-17
Section 2
Signal Descriptions
System Bus Signal Index ........................................................................ 2-1
Address Bus ............................................................................................ 2-1
Address Bus (A27–A0)............................................................................ 2-1
Address Bus (A31–A28).......................................................................... 2-1
Function Codes (FC3–FC0) .................................................................... 2-5
Data Bus.................................................................................................. 2-5
Data Bus (D31–D16). .............................................................................. 2-5
Data Bus (D15–D0). ................................................................................ 2-6
Parity ....................................................................................................... 2-6
Parity (PRTY0). ....................................................................................... 2-6
Parity (PRTY1). ....................................................................................... 2-6
Parity (PRTY2). ....................................................................................... 2-6
Parity (PRTY3). ....................................................................................... 2-6
Memory Controller................................................................................... 2-6
Chip Select/Row Address Select (CS6–CS0/RAS6–RAS0) ................... 2-6
Chip Select/Row Address Select/Interrupt Acknowledge (CS7/RAS7/IACK7).
Column Address Select/Interrupt Acknowledge (CAS3–CAS0/IACK6, 3, 2,
2-7
Address Multiplex (AMUX). ..................................................................... 2-7
Interrupt Request Level (IRQ7–IRQ1)..................................................... 2-7
Bus Control Signals................................................................................. 2-7
Data and Size Acknowledge (DSACK1–DSACK0). ................................ 2-8
Autovector/Interrupt Acknowledge (AVEC/IACK5).................................. 2-8
Address Strobe (AS). .............................................................................. 2-8
Data Strobe (DS)..................................................................................... 2-8
MOTOROLA
MC68360 USER’S MANUAL
Thi d
t
t d ith F M k 4 0 4
i
5 Page 
Table of Contents
Paragraph
Number
Title
Page
Number
5.7
5.7.1
5.7.1.1
5.7.1.2
5.7.1.3
5.7.1.3.1
5.7.1.3.2
5.7.1.3.3
5.7.1.4
5.7.1.5
5.7.1.6
5.7.1.7
5.7.2
5.7.2.1
5.7.2.2
5.7.2.3
5.7.2.4
5.7.2.5
5.7.2.6
5.7.2.7
5.7.2.8
5.7.2.9
5.7.2.10
5.7.2.11
5.7.2.12
5.7.2.13
5.7.2.14
Instruction Execution Timing ................................................................. 5-82
Resource Scheduling ............................................................................ 5-83
Microsequencer..................................................................................... 5-83
Instruction Pipeline ................................................................................ 5-83
Bus Controller Resources ..................................................................... 5-83
Prefetch Controller ................................................................................ 5-84
Write-Pending Buffer ............................................................................. 5-84
Microbus Controller ............................................................................... 5-85
Instruction Execution Overlap ............................................................... 5-85
Effects of Wait States ............................................................................ 5-86
Instruction Execution Time Calculation ................................................. 5-86
Effects of Negative Tails........................................................................ 5-87
Instruction Timing Tables ...................................................................... 5-88
Fetch Effective Address ........................................................................ 5-90
Calculate Effective Address .................................................................. 5-91
MOVE Instruction .................................................................................. 5-92
Special-Purpose MOVE Instruction....................................................... 5-92
Arithmetic/Logic Instructions ................................................................. 5-93
Immediate Arithmetic/Logic Instructions................................................ 5-95
Binary-Coded Decimal and Extended Instructions................................ 5-95
Single Operand Instructions .................................................................. 5-96
Shift/Rotate Instructions ........................................................................ 5-96
Bit Manipulation Instructions ................................................................. 5-97
Conditional Branch Instructions............................................................. 5-98
Control Instructions ............................................................................... 5-99
Exception-Related Instructions and Operations .................................. 5-100
Save and Restore Operations ............................................................. 5-101
6.1
6.2
6.3
6.3.1
6.3.1.1
6.3.1.2
6.3.1.2.1
6.3.1.2.2
6.3.1.2.3
6.3.1.2.4
6.3.2
6.3.2.1
6.3.2.2
6.3.3
6.3.4
6.4
Section 6
System Integration Module (SIM60)
Module Overview..................................................................................... 6-1
Module Base Address Register (MBAR) ................................................. 6-3
System Configuration and Protection...................................................... 6-3
System Configuration .............................................................................. 6-5
SIM60 Interrupt Generation..................................................................... 6-6
Simultaneous SIM60 Interrupt Sources................................................... 6-8
Bus Monitor ............................................................................................. 6-8
Spurious Interrupt Monitor....................................................................... 6-8
Double Bus Fault Monitor........................................................................ 6-9
Software Watchdog Timer (SWT) ........................................................... 6-9
Periodic Interrupt Timer (PIT)................................................................ 6-10
PIT Period Calculation........................................................................... 6-10
Using the PIT as a Real-Time Clock ..................................................... 6-11
Freeze Support...................................................................................... 6-11
Low-Power Stop Support ...................................................................... 6-11
Low Power in Normal Operation ........................................................... 6-12
MOTOROLA
MC68360 USER’S MANUAL
vii
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet M68300.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| M68300 | QUad Integrated Communications Controller Users Manual | Motorola Inc |
| M68302FADS | MC68302 Family Application Development System | Motorola Inc |
| M68302FADS | MC68302 Family Application Development System | Motorola Inc |
| M68302FADS | MC68302 Family Application Development System |  Motorola Semiconductors |
| Número de pieza | Descripción | Fabricantes |
| SLA6805M | High Voltage 3 phase Motor Driver IC. |
 Sanken |
| SDC1742 | 12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters. |
 Analog Devices |
|
DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares, |
| DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar |