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PDF M62352P Data sheet ( Hoja de datos )
| Número de pieza | M62352P | |
| Descripción | 8-BIT 12CH D-A CONVERTER WITH BUFFER AMPLIFIERS | |
| Fabricantes | Mitsubishi | |
| Logotipo |  |
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MITSUBISHI<Dig.Ana.INTERFACE>
M62352P,FP,GP
8-BIT 12CH D-A CONVERTER WITH BUFFER AMPLIFIERS
DESCRIPTION
The M62352 is an integrated circuit semiconductor of CMOS
structure with 12 channels of built-in D-A converters with
output buffer operational amplifiers.
The 3-wire serial interface method is used for the transfer
format mum wiring.
It is able to cascading serial use with Do terminal.
The output buffer operational amplifier operates in the whole
voltage range from power supply to ground for both
input/output.
FEATURES
•12bit serial data input(3-wire serial data transfer method)
•Highly stable output buffer operational amplifier allow operation
in the all voltage range from power supply to ground.
APPLICATION
Adjustment/control of industrial or home-use electronic
equipment,such as VTR camera,VTR set,TV,and CRT
display.
PIN CONFIGURATION (TOP VIEW)
Vss
(VrefL)
1
Ao3 2
20 GND
19 Ao2
Ao4 3
18 Ao1
Ao5 4
17 DI
Ao6 5
16 CLK
Ao7 6
15 LD
Ao8 7
14 DO
Ao9 8
13 Ao12
Ao10 9
VDD
(VrefU)
10
12 Ao11
11 Vcc
Outline 20P4B(P)
20P2N-A(FP)
20P2E-A(GP)
BLOCK DIAGRAM
GND
Ao2
20 19
Ao1
18
-
8-BIT
R-2R D-A
Ch2
8-BIT
LATCH
.....
-
D-A
1
L
(12)
DI
CLK
LD
Do
Ao12
Ao11
Vcc
17 16
15 14
13 12
11
12-BIT SHIFT REGISTER
D0 1 2 3 4 5 6 D7
D8 9 10 D11
ADDRESS
(8) DECODER
.....
(12)
-
D-A
12
L
-
D-A
11
L
(12)
8-BIT
LATCH
Ch3
8-BIT
R-2R D-A
BUFFER
OP AMP
1
Vss
(VrefL)
-
2
Ao3
L
4
D-A
-
3
Ao4
L
5
D-A
-
4
Ao5
L
6
D-A
-
L
7
D-A
-
L
8
D-A
-
56 7
Ao6 Ao7 Ao8
MITSUBISHI
ELECTRIC
L
9
D-A
-
8
Ao9
L
10
D-A
-
9
Ao10
10
VDD
(VrefU)
( 1/6)
1 page  
MITSUBISHI<Dig.Ana.INTERFACE>
M62352P,FP,GP
8-BIT 12CH D-A CONVERTER WITH BUFFER AMPLIFIERS
AC CHARACTERISTICS(Vcc,VrefU=+5V±10%,Vcc≥VrefU,GND,VrefL=0V,Ta=-20~+85°C, unless otherwise noted)
Symbol
Parameter
Test conditions
Limits
Min Typ Max
tCLK Clock "L"pulse width
200
tCKH Clock "H"pulse width
200
tCR Clock rise time
200
tCF Clock fall time
200
tDCH
Data setup time
30
tCHD
Data hold time
60
tCHL LD setup time
200
tLDC LD hold time
100
tLDH LD "H" pulse width
100
tDO Data output delay time
CL≤100pF
70 350
tLDD D-A output setting time
CL≤100pF VAQ:0.5 4.5V
The time until the output becomes the
final value of 1/2 LSB
300
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
µs
TIMING CHART
tCR tCKH tCF
CLK
tCKL
DI
LD
D-A
OUTPUT
DO
OUTPUT
tDCH tCHD
tCHL
tDO
tLDH
tLDC
tLDD
MITSUBISHI
ELECTRIC
( 5/6)
5 Page | ||
| Páginas | Total 6 Páginas | |
| PDF Descargar | [ Datasheet M62352P.PDF ] | |
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