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PDF M54HCT30 Data sheet ( Hoja de datos )

Número de pieza M54HCT30
Descripción 8 INPUT NAND GATE
Fabricantes ST Microelectronics 
Logotipo ST Microelectronics Logotipo



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No Preview Available ! M54HCT30 Hoja de datos, Descripción, Manual

. HIGH SPEED
tPD = 15 ns (TYP.) AT VCC = 5 V
. LOW POWER DISSIPATION
ICC = 1 µA (MAX.) AT TA = 25 °C
. COMPATIBLE WITH TTL OUTPUTS
VIH = 2V (MIN.) VIL = 0.8V (MAX)
. OUTPUT DRIVE CAPABILITY
10 LSTTL LOADS
. SYMMETRICAL OUTPUT IMPEDANCE
IOH= IOL = 4 mA (MIN.)
. BALANCED PROPAGATION DELAYS
tPLH = tPHL
. PIN AND FUNCTION COMPATIBLE WITH
54/74LS30
DESCRIPTION
The M54/74HCT30 is a high speed CMOS 8-INPUT
NAND GATE fabricated with silicon gate C2MOS
technology.
It has the same high speed performance of LSTTL
combined with true CMOS low power consumption.
The internal circuit is composed of 5 stages includ-
ing buffer output, which gives high noise immunity
and stable output. All inputs are equipped with pro-
tection circuits against static discharge and transient
excess voltage.This integrated circuit has input and
output characteristics that are fully compatible with
54/74 LSTTL logic families. M54/74HCT devices
are designed to directly interface HSC2MOS sys-
tems with TTL and NMOS components. They are
also plug in replacements for LSTTL devices giving
a reduction of power consumption.
INPUT AND OUTPUT EQUIVALENT CIRCUIT
M54HCT30
M74HCT30
8 INPUT NAND GATE
B1R
(Plastic Package)
F1R
(Ceramic Package)
M 1R
(Micro Package)
C1R
(Chip Carrier)
ORDER CODES :
M54HCT30F1R
M74HCT30M1R
M74HCT30B1R
M 74H CT 3 0C 1R
PIN CONNECTIONS (top view)
February 1993
NC =
No Internal
Connection
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1 page




M54HCT30 pdf
DIM.
a1
B
b
b1
D
E
e
e3
F
I
L
Z
M54/M74HCT30
Plastic DIP14 MECHANICAL DATA
MIN.
0.51
1.39
1.27
mm
TYP.
0.5
0.25
8.5
2.54
15.24
3.3
MAX.
1.65
20
7.1
5.1
2.54
MIN.
0.020
0.055
0.050
inch
TYP.
0.020
0.010
0.335
0.100
0.600
0.130
MAX.
0.065
0.787
0.280
0.201
0.100
P001A
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