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PDF M54HCT160 Data sheet ( Hoja de datos )
| Número de pieza | M54HCT160 | |
| Descripción | SYNCHRONOUS PRESETTABLE 4-BIT COUNTER | |
| Fabricantes | ST Microelectronics | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de M54HCT160 (archivo pdf) en la parte inferior de esta página. Total 16 Páginas | ||
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M54/74HCT160/161
M54/74HCT162/163
SYNCHRONOUS PRESETTABLE 4-BIT COUNTER
. HIGH SPEED
fMAX = 50 MHz (TYP.) AT VCC = 5 V
. LOW POWER DISSIPATION
ICC = 4 µA (MAX.) AT 25 °C
. OUTPUT DRIVE CAPABILITY
10 LSTTL LOADS
. BALANCED PROPAGATION DELAYS
tPLH = tPHL
. SYMMETRICAL OUTPUT IMPEDANCE
IOH = IOL = 4 mA (MIN.)
. COMPATIBLE WITH TTL OUTPUTS
VIH = 2V (MIN.); VIL = 0.8V (MAX.)
. PIN AND FUNCTION COMPATIBLE
WITH 54/74LS160 ∼ 163
B1R
(Plastic Package)
F1R
(Ceramic Package)
M 1R
(Micro Package)
C1R
(Chip Carrier)
DESCRIPTION
M54/74HCT160 Decade, Asynchronous Clear
M54/74HCT161 Binary, Asynchronous Clear
M54/74HCT162 Decade, Synchronous Clear
M54/74HCT163 Binary, Synchronous Clear
ORDER CODES :
M54HCTXXXF1R M74HCTXXXM1R
M74HCTXXXB1R M74HCTXXXC1R
PIN CONNECTIONS (top view)
The M54/74HCT160, 161, 162 and 163 are high
speed CMOS SYNCHRONOUS PRESETTABLE
COUNTERS fabricated with silicon gate C2MOS
technology. They have the same high speed oper-
ation similar to equivalent LSTTL while maintaining
the CMOS low power dissipation.
The M54/74HCT160/162 are BCD Decade counter-
s and the M54/74HCT161/163 are 4 bit binary
counters. The CLOCK input is active on the rising
edge. Both LOAD and CLEAR inputs are active
Low.
Presetting of all four IC’s is synchronous on the ris-
ing edge of the CLOCK. The function on the
M54/74HCT162/163 is synchronous to CLOCK,
while the M54/74HCT160/161 counters are cleared
asynchronously. Two enable inputs (TE and PE)
and CARRY output are provided to enable easycas-
cading of counters, which facilities easy implemen-
tation of N-bit counters without using external gates.
This integrated circuit has input and output charac-
teristics that are fully compatible with 54/74 LSTTL
logic families. M54/74HCT devices are designed to
directly interface HSC2MOS systems with TTL and
NMOS components. They are also plug in replace-
ments for LSTTL devices giving a reduction of
power consumption. All inputs are equipped with
NC =
No Inter-
nal Con-
October 1993
1/16
1 page  
LOGIC DIAGRAM
HCT160
M54/M74HCT160/161/162/163
LOGIC DIAGRAM
HCT161
5/16
5 Page 
TEST CIRCUIT ICC (Opr.)
TYPICAL APPLICATION
M54/M74HCT160/161/162/163
TOTAL OPERATING CURRENT WHEN
USING A CAPACITIVE LOAD
When the outputs drive a capacitive load, the
total current can be calculated as follows :
For M74HCT160/162 :
∆
lCC
= fCK
⋅
VCC⋅
C2a
+
Cb
5
+
Cc
10
+
Cd
10
+
C1c0a
For M74HCT161/163 :
∆
lCC
= fCK
⋅
VCC⋅
Ca
2
+
Cb
4
+
Cc
8
+
Cd
16
+
Cca
16
Ca to Cca are the capacitors loading the out-
puts.
11/16
11 Page | ||
| Páginas | Total 16 Páginas | |
| PDF Descargar | [ Datasheet M54HCT160.PDF ] | |
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