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PDF M29W320 Data sheet ( Hoja de datos )
| Número de pieza | M29W320 | |
| Descripción | 32 Mbit 4Mb x8 or 2Mb x16 / Boot Block 3V Supply Flash Memory | |
| Fabricantes | ST Microelectronics | |
| Logotipo |  |
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M29W320DT
M29W320DB
32 Mbit (4Mb x8 or 2Mb x16, Boot Block)
3V Supply Flash Memory
FEATURES SUMMARY
s SUPPLY VOLTAGE
– VCC = 2.7V to 3.6V for Program, Erase and
Read
– VPP =12V for Fast Program (optional)
s ACCESS TIME: 70, 90ns
s PROGRAMMING TIME
– 10µs per Byte/Word typical
s 67 MEMORY BLOCKS
– 1 Boot Block (Top or Bottom Location)
– 2 Parameter and 64 Main Blocks
s PROGRAM/ERASE CONTROLLER
– Embedded Byte/Word Program algorithms
s ERASE SUSPEND and RESUME MODES
– Read and Program another Block during
Erase Suspend
s UNLOCK BYPASS PROGRAM COMMAND
– Faster Production/Batch Programming
s VPP/WP PIN for FAST PROGRAM and WRITE
PROTECT
s TEMPORARY BLOCK UNPROTECTION
MODE
s COMMON FLASH INTERFACE
– 64 bit Security Code
s LOW POWER CONSUMPTION
– Standby and Automatic Standby
s 100,000 PROGRAM/ERASE CYCLES per
BLOCK
s ELECTRONIC SIGNATURE
– Manufacturer Code: 0020h
– Top Device Code M29W320DT: 22CAh
– Bottom Device Code M29W320DB: 22CBh
Figure 1. Packages
TSOP48 (N)
12 x 20mm
FBGA
TFBGA63 (ZA)
63 ball array
May 2003
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1 page  
M29W320DT, M29W320DB
SUMMARY DESCRIPTION
The M29W320D is a 32 Mbit (4Mb x8 or 2Mb x16)
non-volatile memory that can be read, erased and
reprogrammed. These operations can be per-
formed using a single low voltage (2.7 to 3.6V)
supply. On power-up the memory defaults to its
Read mode where it can be read in the same way
as a ROM or EPROM.
The memory is divided into blocks that can be
erased independently so it is possible to preserve
valid data while old data is erased. Each block can
be protected independently to prevent accidental
Program or Erase commands from modifying the
memory. Program and Erase commands are writ-
ten to the Command Interface of the memory. An
on-chip Program/Erase Controller simplifies the
process of programming or erasing the memory by
taking care of all of the special operations that are
required to update the memory contents. The end
of a program or erase operation can be detected
and any error conditions identified. The command
set required to control the memory is consistent
with JEDEC standards.
The blocks in the memory are asymmetrically ar-
ranged, see Figures 5 and 6 and Tables 19 and
20. The first or last 64 Kbytes have been divided
into four additional blocks. The 16 Kbyte Boot
Block can be used for small initialization code to
start the microprocessor, the two 8 Kbyte Param-
eter Blocks can be used for parameter storage and
the remaining 32 Kbyte is a small Main Block
where the application may be stored.
Chip Enable, Output Enable and Write Enable sig-
nals control the bus operation of the memory.
They allow simple connection to most micropro-
cessors, often without additional logic.
The memory is offered in TSOP48 (12 x 20mm) and
TFBGA63 (7x11mm, 0.8mm pitch) packages. The
memory is supplied with all the bits erased (set to
1).
Figure 2. Logic Diagram
VCC VPP/WP
21
A0-A20
15
DQ0-DQ14
W
E
G
RP
BYTE
M29W320DT
M29W320DB
DQ15A–1
RB
VSS
AI90189B
Table 1. Signal Names
A0-A20
Address Inputs
DQ0-DQ7 Data Inputs/Outputs
DQ8-DQ14 Data Inputs/Outputs
DQ15A–1 Data Input/Output or Address Input
E Chip Enable
G Output Enable
W Write Enable
RP Reset/Block Temporary Unprotect
RB Ready/Busy Output
BYTE
Byte/Word Organization Select
VCC Supply Voltage
VPP/WP
VPP/Write Protect
VSS Ground
NC Not Connected Internally
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5 Page 
M29W320DT, M29W320DB
Note that if VPP/WP is at VIL, then the 16 KByte
outermost boot block will remain protect even if RP
is at VID.
After a Hardware Reset, Bus Read and Bus Write
operations cannot begin until Ready/Busy be-
comes high-impedance. See Table 15 and Figure
14, Reset/Temporary Unprotect AC Characteris-
tics.
The use of an open-drain output allows the Ready/
Busy pins from several memories to be connected
to a single pull-up resistor. A Low will then indicate
that one, or more, of the memories is busy.
Byte/Word Organization Select (BYTE). The
Byte/Word Organization Select pin is used to
switch between the x8 and x16 Bus modes of the
memory. When Byte/Word Organization Select is
Low, VIL, the memory is in x8 mode, when it is
High, VIH, the memory is in x16 mode.
VCC Supply Voltage (2.7V to 3.6V). VCC pro-
vides the power supply for all operations (Read,
Program and Erase).
The Command Interface is disabled when the VCC
Supply Voltage is less than the Lockout Voltage,
VLKO. This prevents Bus Write operations from ac-
cidentally damaging the data during power up,
power down and power surges. If the Program/
Erase Controller is programming or erasing during
this time then the operation aborts and the memo-
ry contents being altered will be invalid.
A 0.1µF capacitor should be connected between
the VCC Supply Voltage pin and the VSS Ground
pin to decouple the current surges from the power
supply. The PCB track widths must be sufficient to
carry the currents required during Program and
Erase operations, ICC3.
VSS Ground. VSS is the reference for all voltage
measurements.
11/44
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| Páginas | Total 44 Páginas | |
| PDF Descargar | [ Datasheet M29W320.PDF ] | |
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