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PDF M29W160DT Data sheet ( Hoja de datos )
| Número de pieza | M29W160DT | |
| Descripción | 16 Mbit 2Mb x8 or 1Mb x16 / Boot Block 3V Supply Flash Memory | |
| Fabricantes | ST Microelectronics | |
| Logotipo |  |
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M29W160DT
M29W160DB
16 Mbit (2Mb x8 or 1Mb x16, Boot Block)
3V Supply Flash Memory
PRELIMINARY DATA
FEATURES SUMMARY
s SINGLE 2.7 to 3.6V SUPPLY VOLTAGE for
PROGRAM, ERASE and READ OPERATIONS
s ACCESS TIME: 70ns
s PROGRAMMING TIME
– 10µs per Byte/Word typical
s 35 MEMORY BLOCKS
– 1 Boot Block (Top or Bottom Location)
– 2 Parameter and 32 Main Blocks
s PROGRAM/ERASE CONTROLLER
– Embedded Program and Erase algorithms
s ERASE SUSPEND and RESUME MODES
– Read and Program another Block during
Erase Suspend
s UNLOCK BYPASS PROGRAM COMMAND
– Faster Production/Batch Programming
s TEMPORARY BLOCK UNPROTECTION
MODE
s SECURITY MEMORY BLOCK
s LOW POWER CONSUMPTION
– Standby and Automatic Standby
s 100,000 PROGRAM/ERASE CYCLES per
BLOCK
s ELECTRONIC SIGNATURE
– Manufacturer Code: 0020h
– Top Device Code M29W160DT: 22C4h
– Bottom Device Code M29W160DB: 2249h
Figure 1. Packages
44
TSOP48 (N)
12 x 20mm
1
SO44 (M)
FBGA
LFBGA48 (ZA)
8 x 6 solder balls
January 2001
This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice.
1/29
1 page  
M29W160DT, M29W160DB
SUMMARY DESCRIPTION
The M29W160D is a 16 Mbit (2Mb x8 or 1Mb x16)
non-volatile memory that can be read, erased and
reprogrammed. These operations can be per-
formed using a single low voltage (2.7 to 3.6V)
supply. On power-up the memory defaults to its
Read mode where it can be read in the same way
as a ROM or EPROM.
The memory is divided into blocks that can be
erased independently so it is possible to preserve
valid data while old data is erased. Each block can
be protected independently to prevent accidental
Program or Erase commands from modifying the
memory. Program and Erase commands are writ-
ten to the Command Interface of the memory. An
on-chip Program/Erase Controller simplifies the
process of programming or erasing the memory by
taking care of all of the special operations that are
required to update the memory contents.
The end of a program or erase operation can be
detected and any error conditions identified. The
command set required to control the memory is
consistent with JEDEC standards.
The blocks in the memory are asymmetrically ar-
ranged, see Tables 2 and 3, Block Addresses. The
first or last 64 Kbytes have been divided into four
additional blocks. The 16 Kbyte Boot Block can be
used for small initialization code to start the micro-
processor, the two 8 Kbyte Parameter Blocks can
be used for parameter storage and the remaining
32K is a small Main Block where the application
may be stored.
Chip Enable, Output Enable and Write Enable sig-
nals control the bus operation of the memory.
They allow simple connection to most micropro-
cessors, often without additional logic.
The memory is offered in TSOP48 (12 x 20mm),
SO44 and LFBGA48 (0.8mm pitch) packages and
it is supplied with all the bits erased (set to ’1’).
Figure 2. Logic Diagram
VCC
20
A0-A19
15
DQ0-DQ14
W DQ15A–1
M29W160DT
E M29W160DB BYTE
G RB
RP
VSS
AI03843
Note: RB not available on SO44 package.
Table 1. Signal Names
A0-A19
Address Inputs
DQ0-DQ7 Data Inputs/Outputs
DQ8-DQ14 Data Inputs/Outputs
DQ15A–1
Data Input/Output or Address Input
E Chip Enable
G Output Enable
W Write Enable
RP Reset/Block Temporary Unprotect
RB
Ready/Busy Output
(Not available on SO44 package)
BYTE
Byte/Word Organization Select
VCC Supply Voltage
VSS Ground
NC Not Connected Internally
DU Don’t Use as internally connected
5/29
5 Page 
M29W160DT, M29W160DB
Table 5. Bus Operations, BYTE = VIH
Operation
E GW
Bus Read
VIL VIL VIH
Bus Write
VIL VIH VIL
Output Disable
X VIH VIH
Standby
VIH X
X
Read Manufacturer
Code
VIL
VIL
VIH
Read Device Code VIL VIL VIH
Note: X = VIL or VIH.
Address Inputs
A0-A19
Cell Address
Command Address
X
X
A0 = VIL, A1 = VIL, A9 = VID,
Others VIL or VIH
A0 = VIH, A1 = VIL, A9 = VID,
Others VIL or VIH
Data Inpu ts/Outputs
DQ15A–1, DQ14-DQ0
Data Output
Data Input
Hi-Z
Hi-Z
0020h
22C4h (M29W160DT)
2249h (M29W160DB)
COMMAND INTERFACE
All Bus Write operations to the memory are inter-
preted by the Command Interface. Commands
consist of one or more sequential Bus Write oper-
ations. Failure to observe a valid sequence of Bus
Write operations will result in the memory return-
ing to Read mode. The long command sequences
are imposed to maximize data security.
The address used for the commands changes de-
pending on whether the memory is in 16-bit or 8-
bit mode. See either Table 7, or 8, depending on
the configuration that is being used, for a summary
of the commands.
Read/Reset Command. The Read/Reset com-
mand returns the memory to its Read mode where
it behaves like a ROM or EPROM, unless stated
otherwise (see Security Data command). It also
resets the errors in the Status Register. Either one
or three Bus Write operations can be used to issue
the Read/Reset command.
If the Read/Reset command is issued during a
Block Erase operation or following a Programming
or Erase error then the memory will take upto 10µs
to abort. During the abort period no valid data can
be read from the memory. Issuing a Read/Reset
command during a Block Erase operation will
leave invalid data in the memory.
Auto Select Command. The Auto Select com-
mand is used to read the Manufacturer Code, the
Device Code and the Block Protection Status.
Three consecutive Bus Write operations are re-
quired to issue the Auto Select command. Once
the Auto Select command is issued the memory
remains in Auto Select mode until another com-
mand is issued.
From the Auto Select mode the Manufacturer
Code can be read using a Bus Read operation
with A0 = VIL and A1 = VIL. The other address bits
may be set to either VIL or VIH. The Manufacturer
Code for STMicroelectronics is 0020h.
The Device Code can be read using a Bus Read
operation with A0 = VIH and A1 = VIL. The other
address bits may be set to either VIL or VIH. The
Device Code for the M29W160DT is 22C4h and
for the M29W160DB is 2249h.
The Block Protection Status of each block can be
read using a Bus Read operation with A0 = VIL,
A1 = VIH, and A12-A19 specifying the address of
the block. The other address bits may be set to ei-
ther VIL or VIH. If the addressed block is protect-
ed then 01h is output on Data Inputs/Outputs
DQ0-DQ7, otherwise 00h is output.
Program Command. The Program command
can be used to program a value to one address in
the memory array at a time. The command re-
quires four Bus Write operations, the final write op-
eration latches the address and data in the internal
state machine and starts the Program/Erase Con-
troller.
If the address falls in a protected block then the
Program command is ignored, the data remains
unchanged. The Status Register is never read and
no error condition is given.
During the program operation the memory will ig-
nore all commands. It is not possible to issue any
command to abort or pause the operation. Typical
program times are given in Table 9. Bus Read op-
erations during the program operation will output
the Status Register on the Data Inputs/Outputs.
See the section on the Status Register for more
details.
After the program operation has completed the
memory will return to the Read mode, unless an
error has occurred. When an error occurs the
memory will continue to output the Status Regis-
11/29
11 Page | ||
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| PDF Descargar | [ Datasheet M29W160DT.PDF ] | |
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