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Semtech - Low Capacitance TVS Diode Array For High-Speed Data Interfaces

Numéro de référence LCDA05
Description Low Capacitance TVS Diode Array For High-Speed Data Interfaces
Fabricant Semtech 
Logo Semtech 





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LCDA05 fiche technique
LCDA05 THRU LCDA24
Low Capacitance TVS Diode Array
For High-Speed Data Interfaces
PROTECTION PRODUCTS
Description
Features
The LCDA series of TVS arrays are designed to protect
sensitive electronics from damage or latch-up due to
ESD and other voltage-induced transient events. Each
device will protect two high-speed lines. They are
available with operating voltages of 5V, 12V, 15V and
24V. They are bidirectional devices and may be used on
lines where the signal polarities are above and below
ground.
TVS diodes are solid-state devices designed specifically
for transient suppression. They offer desirable charac-
teristics for board level protection including fast re-
sponse time, low operating and clamping voltage and
no device degradation. The LCDA series devices
feature low capacitance compensation diodes in series
with standard TVS diodes to provide an integrated, low
capacitance solution for use on high-speed interfaces.
The LCDA series devices may be used to meet the
immunity requirements of IEC 61000-4-2, level 4.
u Transient protection for high-speed data lines to
IEC 61000-4-2 (ESD) 15kV (air), 8kV (contact)
IEC 61000-4-4 (EFT) 40A (tp = 5/50ns)
IEC 61000-4-5 (Lightning) 24A (tp = 8/20µs)
u Protects two I/O lines
u Low capacitance for high-speed data lines
u Working voltages: 5V, 12V, 15V and 24V
u Low leakage current
u Low operating and clamping voltages
u Solid-state silicon avalanche technology
Mechanical Characteristics
u JEDEC SO-8 (MS-012AA) small outline package
u Molding compound flammability rating: UL 94V-0
u Marking : Part Number, Logo, Date Code
u Packaging : Tape and Reel per EIA 481
Applications
u High-Speed Data Lines
u Microprocessor Based Equipment
u Universal Serial Bus (USB) Port Protection
u Notebooks, Desktops, & Servers
u Instrumentation
u LAN/WAN Equipment
u Peripherals
Circuit Diagram (Each Line Pair)
Revision 9/2000
Schematic & PIN Configuration
18
27
36
45
SO-8 (Top View)
1 www.semtech.com

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