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PDF LC895926 Data sheet ( Hoja de datos )

Número de pieza LC895926
Descripción CD-R Encoder/Decoder IC with Built-in SCSI Interface
Fabricantes Sanyo 
Logotipo Sanyo Logotipo



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No Preview Available ! LC895926 Hoja de datos, Descripción, Manual

Ordering number : EN5829A
CMOS IC
LC895926
CD-R Encoder/Decoder IC with Built-in SCSI Interface
Overview
The LC895926 is a CD-R IC that provides a wide range of
functions including CD-ROM decoding (including ECC)
and encoding, subcode encoding and decoding, CD
encoding, ATIP decoding and CLV servo, and a SCSI
interface that includes the register block.
Features
• ECC and EDC correction/addition for CD-ROM data
(during decoding and encoding)
• Subcode decoding/encoding complete with error
detection and error correction
• ATIP decoding and CRC checking for both encoding
and decoding
• CLV servo control using ATIP data during encoding
• CIRC code insertion and EFM modulation during
encoding
• Access to buffer RAM from microcontroller via
LC895926
• Built-in SCSI interface
• Speeds of 24× for decoding and 12× for encoding
• Transfers speeds of 10 megabytes/s (synchronous) and 5
megabytes/s (asynchronous) with 16-bit 50-ns EDO-
DRAMs
• Buffer RAM sizes between 1 and 32 megabits (using 16-
bit EDO-DRAMs)
• User control over sizes of CD main channel, C2 flag,
and subcode areas in buffer RAM
• Built-in batch transfer function for transferring entire
CD main channel, C2 flag, or subcode area in a single
operation.
• Built-in multiblock transfer function for transferring
multiple blocks in a single operation.
• Automatic sequencing of encoding and decoding
processing for a reduced processing load on the system
microcontroller.
Package Dimensions
unit: mm
3153A-QFP160E
[LC895926]
SANYO: QIP160E
SANYO Electric Co.,Ltd. Semiconductor Bussiness Headquarters
TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN
51398HA (OT) No. 5829-1/7

1 page




LC895926 pdf
LC895926
Continued from preceding page.
Type: I: Input pin, O: Output pin, B: Bidirectional pin, P: Power supply pin, N: No connection pin
Pin Number
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
Pin Name
IO0
IO1
IO2
IO3
IO4
IO5
VDD
IO6
IO7
IO8
IO9
VSS
IO10
IO11
IO12
IO13
IO14
IO15
VDD
VSS
RA0
RA1
RA2
RA3
RA4
RA5
RA6
VSS
RA7
RA8
RA9
RAS0
RAS1
CAS0
CAS1
OE
UWE
LWE
VDD
VSS
DB0
DB1
VDD
DB2
DB3
VSS
DB4
DB5
Type
Description
B
B
B
Data signal pins for ROM encoder/decoder DRAM, with pull-up resistors
B
B
B
P 5V
B
B
Data signal pins for ROM encoder/decoder DRAM, with pull-up resistors
B
B
P
B
B
B
Data signal pins for ROM encoder/decoder DRAM, with pull-up resistors
B
B
B
P 3.3V
P
O
O
O
O Address signal pins for ROM encoder/decoder DRAM
O
O
O
P
O
O Address signal pins for ROM encoder/decoder DRAM
O
O
RAS signal pins for ROM encoder/decoder DRAM
O
O
CAS signal pins for ROM encoder/decoder DRAM
O
O Output enable signal pin for ROM encoder/decoder DRAM
O Upper write enable signal pin for ROM encoder/decoder DRAM
O Lower write enable signal pin for ROM encoder/decoder DRAM
P 5V
P
B
SCSI pins
B
P 3.3V
B
SCSI pins
B
P
B
SCSI pins
B
Continued on next page.
No. 5829-5/7

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