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PDF LC8900KQ Data sheet ( Hoja de datos )

Número de pieza LC8900KQ
Descripción Digital Audio Interface Receiver
Fabricantes Sanyo 
Logotipo Sanyo Logotipo



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No Preview Available ! LC8900KQ Hoja de datos, Descripción, Manual

Ordering number : EN4128B
CMOS LSI
LC8900KQ
Digital Audio Interface Receiver
Preliminary
Overview
The LC8900KQ is a CMOS LSI circuit chip that can be
used to enable the EIAJ CP-1201 formatted data
transmission between digital audio equipment. It is used
by the receiving end and operates synchronously with
input signals. This chip demodulates input signals into
normally-formatted signals.
Features
• On-chip PLL circuit: enables the LSI operation to be
synchronous to the transmitted EIAJ format input
signals.
• Four input pins and one output pin: The output pin
enables the input data to be sent as they are.
• Two data output function modes: 20-bit data LSB first
mode and 16-bit data MSB first mode.
• Four output clocks: Bit clock, LRCK, 384Fs and 256Fs.
All these clocks are synchronized to the data.
• Various signal outputs: copy inhibit, emphasis on:off
control, user’s bit, validity flag and sampling frequency.
• LPF time constant select mode: This function can be
used in the PLL lock-up state.
• Error detect signal output: If an input data error is
detected, this LSI circuit chip outputs the error signal.
In this case, the previous data will be output by the chip.
• Lock-up signal output: This signal is output when the
internal PLL (Phase Locked Loop) block of the LSI
circuit chip is locked.
• The chip has the pin to receive a signal for stopping the
PLL operation.
• Control and processing mode via microcontroller
interface: input pin select, copy information and
sampling frequency output.
• Each input pin has an internal amplifier circuit.
• Si gate, CMOS process technology and single 5V power
supply applicational and functional concept.
Applicational and Functional Concept
Package Dimensions
unit:mm
3148-QFP44MA
[LC8900KQ]
SANYO: QIP44MA
SANYO Electric Co.,Ltd. Semiconductor Bussiness Headquarters
TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110 JAPAN
83096HA (OT)/7062JN No. 4128-1/12

1 page




LC8900KQ pdf
LC8900KQ
AC Characteristics at the Microcontroller Interface Block at Ta = –30 to +75°C, VDD = 4.5V to 5.5V
Parameter
CL low pulse width
CL high pulse width
Data set up time
Data hold time
CL rise time
CL fall time
CE delay time
CL delay time
Data delay time
CL/data delay time
CL delay time
CL/CE delay time
Symbol
TWL
TWH
TDS
TDH
Tr
Tf
TD1
TD2
TD3
TD4
TD5
TD6
Conditions
CL, CE, DI
CL, CE, DI
Load capacitance = 30 pF
Load capacitance = 30 pF
min typ max
100
100
50
50
30
30
1.0
50
25
50
100
1.0
Unit
ns
ns
ns
ns
ns
ns
µs
ns
ns
ns
ns
µs
AC Characteristics at the Microcontroller Interface Block
No. 4128-5/12

5 Page





LC8900KQ arduino
Sample Application Circuit
LC8900KQ
Apply the power to AVDD and two DVDDs simultaneously, or a latch up will occur.
The allowable current to BSA, CD, and BSB pins is 8 mA.
No. 4128-11/12

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