|
|
PDF LC4104C Data sheet ( Hoja de datos )
| Número de pieza | LC4104C | |
| Descripción | LCD Dot Matrix Segment Driver for STN Displays | |
| Fabricantes | Sanyo | |
| Logotipo |  |
|
Hay una vista previa y un enlace de descarga de LC4104C (archivo pdf) en la parte inferior de esta página. Total 9 Páginas | ||
|
No Preview Available !
Ordering number : EN *5194D
Preliminary
Overview
The LC4104 is a segment driver LSI for large-scale dot
matrix LCD displays. The LC4104 latches 160-bits of
display data transferred from the controller over a 4- or 8-
bit parallel interface and generates the LCD drive signals.
In conjunction with the LC4102 common driver, the
LC4104 forms a chip set that can drive large-screen LCD
panels.
Features
• High-voltage CMOS (P-sub) process
• LCD drive voltage: 36 V
• Logic system power-supply voltage: 2.7 to 5.5 V
• Maximum fcp: 12 MHz (VDD = 5 V ±10%),
10 MHz (VDD = 2.7 to 4.5 V)
• Slim chip (The output pads are located along one of the
long sides.)
• Parallel input circuit can be switched between 4 and
8 bits.
• Output directionality switching
• DISPOFF function (Holds the LCD drive voltage at a
fixed level.)
• Display duty ratios: 1/160 to 1/480
• Appropriate for COG (chip on glass) mounting. (A gold
bump structure is adopted in the pad areas.)
• LC4104C: Chip product
CMOS LSI (P-sub)
LC4104C
LCD Dot Matrix Segment Driver
for STN Displays
SANYO Electric Co.,Ltd. Semiconductor Bussiness Headquarters
TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN
43098HA (OT)/73097HA (OT)/D3095HA (OT) No. 5194-1/9
1 page  
LC4104C
Pin Functions
Symbol
I/O
LCD drive outputs
O1 to O160
M
Data
DISP
On
H H H V0
O H L H V2
L L H V3
L H H V5
* * L V5
*: Don’t care. (Must be held either high or low.)
Function
V0 I V0 level drive voltage supply (selected level)
V2 I V2 level drive voltage supply (unselected level)
Pins with the same name must be set to the same potential.
V3 I V3 level drive voltage supply (unselected level)
V5 I V5 level drive voltage supply (selected level)
VDDH
VDD
VSS
DISP
M
EIO1
EIO2
CP
LOAD
TEST
R/L
— High-voltage system power supply. Pins with the same name must be set to the same potential.
— Logic system power supply.
— GND
I LCD off function. All outputs go to the V5 level when this pin is low.
I Alternation signal input
Enable I/O
R/L
EIO1
EIO2
I/O L
I/O H
In Out
Out In
Enable input: The enable input at the first stage is fixed at VSS. For succeeding stages, the enable input is connected to the
enable output from the preceding stage.
Enable output: Connected to the enable input of the next stage when cascode connection is used.
I Data acquisition clock (falling edge)
I Data load clock (falling edge)
I Test input. Must be tied high in normal use.*
Data shift direction setting
R/L BS
O1 to O160 outputs
O1 O2 O3 O4 → . . . O157 O158 O159 O160
L ↑↑↑↑
↑↑↑↑
D7 D6 D5 D4
D3 D2 D1 D0
H
O1 O2 O3 O4 . . .← O157 O158 O159 O160
IH
↑↑↑↑
↑↑↑↑
D0 D1 D2 D3
D4 D5 D6 D7
O1 O2 O3 O4 → . . . O157 O158 O159 O160
L ↑↑↑↑
↑↑↑↑
D3 D2 D1 D0
D3 D2 D1 D0
L
O1 O2 O3 O4 . . .← O157 O158 O159 O160
H ↑↑↑↑
↑↑↑↑
D0 D1 D2 D3
D0 D1 D2 D3
D0 to D7
I Parallel data inputs
BS
I
Input bus setting. Set high for 8-bit input, low for 4-bit input. For 4-bit input, D0 to D3 are used for data input and D4 to D7 must
be tied to ground.
Note: * This IC is sensitive to ESD care must be used when handling this device.
No. 5194-5/9
5 Page | ||
| Páginas | Total 9 Páginas | |
| PDF Descargar | [ Datasheet LC4104C.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| LC4104C | LCD Dot Matrix Segment Driver for STN Displays | Sanyo |
| Número de pieza | Descripción | Fabricantes |
| SLA6805M | High Voltage 3 phase Motor Driver IC. |
 Sanken |
| SDC1742 | 12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters. |
 Analog Devices |
|
DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares, |
| DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar |