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PDF LA7642N Data sheet ( Hoja de datos )
| Número de pieza | LA7642N | |
| Descripción | SECAM Format Color TV Chrominance Circuit | |
| Fabricantes | Sanyo | |
| Logotipo |  |
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Ordering number : EN5693
Monolithic Linear IC
LA7642N
SECAM Format Color TV Chrominance Circuit
Overview
The LA7642N integrates the chrominance circuit for a
SECAM format TV in a single 16-pin DIP (300 mil)
package and provides an adjustment-free discriminator
circuit. In combination with the Sanyo LA7687, LA7688,
this IC can implement a multi-format color TV signal-
processing system.
Features
• Adjustment-free discriminator circuit
• On-chip bell filter
Package Dimensions
unit: mm
3006B-DIP16
[LA7642N]
Specifications
Maximum Ratings at Ta = 25°C
Parameter
Maximum supply voltage
Allowable power dissipation
Operating temperature
Storage temperature
Symbol
VCC max
Pd max
Topr
Tstg
Ta ≤ 65°C
Conditions
SANYO: DIP16
Ratings
9
400
–10 to +65
–55 to +125
Unit
V
mW
°C
°C
Operating Conditions at Ta = 25°C
Parameter
Recommended operating voltage
Operating voltage range
Symbol
VCC
VCC op
Conditions
Ratings
7.8
7.0 to 8.5
Unit
V
V
Operating Characteristics at Ta = 25°C, VCC = 7.8 V, with pin 13 pulled up to VCC through a 20-kΩ resistor
Parameter
[Circuit Voltage and Current]
Circuit current
[Filter Block]
Input impedance
Symbol
Conditions
Chrominance system. Measure the current
ICC flowing into pin 15; With no signal applied to
pin 14.
The pin 14 input impedance. For reference
only (design value)
Ratings
Unit
min typ max
28 35 42 mA
15 kΩ
Continued on next page.
SANYO Electric Co.,Ltd. Semiconductor Bussiness Headquarters
TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110 JAPAN
73097HA(OT) No. 5693-1/6
1 page  
LA7642N
Continued from preceding page.
Parameter
Symbol
Conditions
4.00-MHz input level variations 2
V5DB4
Measure the variation in the pin 5 DC voltage
when the 4.00-MHz input level is changed
from 200 mV p-p to 300 mV p-p.
4.43-MHz input level variations 1
Measure the variation in the pin 3 DC voltage
V3DS44 when the 4.43-MHz input level is changed
from 200 mV p-p to 100 mV p-p.
4.43-MHz input level variations 2
Measure the variation in the pin 3 DC voltage
V3DB44 when the 4.43-MHz input level is changed
from 200 mV p-p to 300 mV p-p.
4.00-MHz input impedance
The pin 9 input impedance. For reference
Z9 only (design value)
4.43-MHz input impedance
The pin 11 input impedance. For reference
Z11 only (design value)
[VCC Dependency]
ALC pulse wave height
dVALC
The percentage change in the ALC pulse
peak value when VCC changes by 1 V.
Measure the ALC pulse peak value when
VCC = 9 V and record this value as VALC9.
Calculate dVALC from the following formula.
(VALC9 – VALC)/1.2/VALC × 100 (%)
Notes: EQU = off: Pull pin 16 to ground through a 4.7-kΩ resistor.
EQU = on: Leave pin 16 open.
Ratings
min typ
–50 0
–50 0
–50 0
15
15
10 15
Unit
max
+50 mV
+50 mV
+50 mV
kΩ
kΩ
20 %
Block Diagram
No. 5693-5/6
5 Page | ||
| Páginas | Total 6 Páginas | |
| PDF Descargar | [ Datasheet LA7642N.PDF ] | |
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