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PDF K4E170412D Data sheet ( Hoja de datos )
| Número de pieza | K4E170412D | |
| Descripción | 4M x 4Bit CMOS Dynamic RAM with Extended Data Out | |
| Fabricantes | Samsung | |
| Logotipo |  |
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K4E170411D, K4E160411D
K4E170412D, K4E160412D
CMOS DRAM
4M x 4Bit CMOS Dynamic RAM with Extended Data Out
DESCRIPTION
This is a family of 4.194,304 x 4 bit Extended Data Out CMOS DRAMs. Extended Data Out Mode offers high speed random access of
memory cells within the same row, so called Hyper Page Mode. Power supply voltage (+5.0V or +3.3V), refresh cycle (2K Ref. or 4K
Ref.), access time (-50 or -60), power consumption(Normal or Low power) and package type(SOJ or TSOP-II) are optional features of
this family. All of this family have CAS-before-RAS refresh, RAS-only refresh and Hidden refresh capabilities. Furthermore, Self-refresh
operation is available in L-version. This 4Mx4 EDO DRAM family is fabricated using Samsung′s advanced CMOS process to realize high
band-width, low power consumption and high reliability. It may be used as main memory unit for high level computer, microcomputer and
personal computer.
FEATURES
• Part Identification
- K4E170411D-B(F) (5V, 4K Ref.)
- K4E160411D-B(F) (5V, 2K Ref.)
- K4E170412D-B(F) (3.3V, 4K Ref.)
- K4E160412D-B(F) (3.3V, 2K Ref.)
• Active Power Dissipation
Speed
-50
-60
3.3V
4K 2K
324 396
288 360
Unit : mW
5V
4K 2K
495 605
440 550
• Refresh Cycles
Part VCC Refresh Refresh period
NO. cycle Normal L-ver
K4E170411D
K4E170412D
K4E160411D
K4E160412D
5V
3.3V
5V
3.3V
4K
2K
64ms
32ms
128ms
• Performance Range
Speed tRAC
-50 50ns
tCAC
15ns
-60 60ns 17ns
tRC
84ns
104ns
tHPC
20ns
25ns
Remark
5V/3.3V
5V/3.3V
• Extended Data Out Mode operation
(Fast Page Mode with Extended Data Out)
• CAS-before-RAS refresh capability
• RAS-only and Hidden refresh capability
• Self-refresh capability (L-ver only)
• Fast parallel test mode capability
• TTL(5V)/LVTTL(3.3V) compatible inputs and outputs
• Early Write or output enable controlled write
• JEDEC Standard pinout
• Available in Plastic SOJ and TSOP(II) packages
• Single +5V±10% power supply (5V product)
• Single +3.3V±0.3V power supply (3.3V product)
FUNCTIONAL BLOCK DIAGRAM
RAS
CAS
W
A0-A11
(A0 - A10)*1
A0 - A9
(A0 - A10)*1
Control
Clocks
VBB Generator
Refresh Timer
Refresh Control
Refresh Counter
Row Address Buffer
Col. Address Buffer
Row Decoder
Memory Array
4,194,304 x4
Cells
Column Decoder
Vcc
Vss
Data in
Buffer
DQ0
to
DQ3
Data out
Buffer
OE
Note) *1 : 2K Refresh
SAMSUNG ELECTRONICS CO., LTD. reserves the right to
change products and specifications without notice.
1 page  
K4E170411D, K4E160411D
K4E170412D, K4E160412D
CAPACITANCE (TA=25°C, VCC=5V or 3.3V, f=1MHz)
Parameter
Symbol
Input capacitance [A0 ~ A11]
CIN1
Input capacitance [RAS, CAS, W, OE]
CIN2
Output capacitance [DQ0 - DQ3]
CDQ
Min
-
-
-
AC CHARACTERISTICS (0°C≤TA≤70°C, See note 1,2)
Test condition (5V device) : VCC=5.0V±10%, Vih/Vil=2.4/0.8V, Voh/Vol=2.0/0.8V
Test condition (3.3V device) : VCC=3.3V±0.3V, Vih/Vil=2.0/0.8V, Voh/Vol=2.0/0.8V
Parameter
Symbol
Random read or write cycle time
Read-modify-write cycle time
Access time from RAS
Access time from CAS
Access time from column address
CAS to output in Low-Z
Output buffer turn-off delay from CAS
OE to output in Low-Z
Transition time (rise and fall)
RAS precharge time
RAS pulse width
RAS hold time
CAS hold time
CAS pulse width
RAS to CAS delay time
RAS to column address delay time
CAS to RAS precharge time
Row address set-up time
Row address hold time
Column address set-up time
Column address hold time
Column address to RAS lead time
Read command set-up time
Read command hold time referenced to CAS
Read command hold time referenced to RAS
Write command hold time
Write command pulse width
Write command to RAS lead time
Write command to CAS lead time
tRC
tRWC
tRAC
tCAC
tAA
tCLZ
tCEZ
tOLZ
tT
tRP
tRAS
tRSH
tCSH
tCAS
tRCD
tRAD
tCRP
tASR
tRAH
tASC
tCAH
tRAL
tRCS
tRCH
tRRH
tWCH
tWP
tRWL
tCWL
-50
Min Max
84
116
50
13
25
3
3 13
3
2 50
30
50 10K
13
38
8 10K
20 37
15 25
5
0
10
0
8
25
0
0
0
10
10
13
8
CMOS DRAM
Max
5
7
7
Units
pF
pF
pF
-60
Min Max
104
140
60
15
30
3
3 15
3
2 50
40
60 10K
15
45
10 10K
20 45
15 30
5
0
10
0
10
30
0
0
0
10
10
15
10
Units Notes
ns
ns
ns 3,4,10
ns 3,4,5
ns 3,10
ns 3
ns 6,14
ns 3
ns 2
ns
ns
ns
ns
ns
ns 4
ns 10
ns
ns
ns
ns
ns
ns
ns
ns 8
ns 8
ns
ns
ns
ns
5 Page 
K4E170411D, K4E160411D
K4E170412D, K4E160412D
WRITE CYCLE ( OE CONTROLLED WRITE )
NOTE : DOUT = OPEN
VIH -
RAS
VIL -
VIH -
CAS
VIL -
VIH -
A
VIL -
VIH -
W
VIL -
VIH -
OE
VIL -
DQ0 ~ DQ3(7)
VIH -
VIL -
tRAS
tRC
tCRP
tRCD
tRAD
tASR tRAH
ROW
ADDRESS
tASC
tCSH
tRSH
tCAS
tRAL
tCAH
COLUMN
ADDRESS
tCWL
tRWL
tWP
tOED
tDS
tOEH
tDH
DATA-IN
CMOS DRAM
tRP
tCRP
Don′t care
Undefined
11 Page | ||
| Páginas | Total 21 Páginas | |
| PDF Descargar | [ Datasheet K4E170412D.PDF ] | |
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