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PDF M52342SP Data sheet ( Hoja de datos )

Número de pieza M52342SP
Descripción PLL-SPLIT VIF/SIF IC
Fabricantes Mitsubishi 
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MITSUBISHI ICs (TV)
M52342SP
PLL-SPLIT VIF/SIF IC
DESCRIPTION
The M52342SP is IF signal-processing IC for VCRs and TVs. It
enable the PLL detection system despite size as small as that of
conventional quasi-synchronous VIF/SIF detector, IF/RF AGC, SIF
limiter, FM detector, QIF AGC and EQ AMP.
FEATURES
Video detection output is 2VP-P. It has built-in EQ AMP.
The package is a 20-pin shrink-DIP, suitable for space saving.
The video detector uses PLL for full synchronous detection
circuit. It produces excellent characteristics of DG, DP, 920kHz
beat, and cross color.
Dynamic AGC realizes high speed response with only single
filter.
Video IF and sound IF signal processings are separated from
each other. VCO output is used to obtain intercarrier. This PLL-
SPLIT method and built-in QIF AGC provide good sound
sensitivity and reduces buzz.
As AFT output voltage uses the APC output voltage, VCO coil is
not used.
Audio FM demodulation uses PLL system, so it has wide
frequency range with no external parts and no adjustment.
APPLICATION
TV sets, VCR tuners
RECOMMENDED OPERATING CONDITION
In case of VCC and Vreg. out short
Supply voltage range....................................................4.75 to 5.25V
Recommended supply voltage...................................................5.0V
Incase of Vreg. out open
Supply voltage range......................................................8.5 to 12.5V
PIN CONFIGURATION (TOP VIEW)
RF AGC DELAY 1
AFT OUT 2
RF AGC OUT 3
VIF IN 4
VIF IN 5
GND 6
QIF DET IN 7
IF AGC FILTER 8
NFB 9
AUDIO OUT 10
20 EQ F/B
19 APC FILTER
18 VIDEO OUT
17 Vreg. OUT
16 VCO COIL
15 VCO COIL
14 Vcc
13 QIF OUT
12 AFT SW/NPSW
11 LIMITER IN
Outline 20P2N-A
BLOCK DIAGRAM
APC FILTER
Vreg. OUT
VCO COIL
EQ F/B
VIDEO OUT
VCO COIL
20 19 18 17 16 15
Vcc
14
QIF OUT
LIMITER IN
AFT SW/NPSW
13 12 11
VCO
Vcc REG
Inter
Split
LIM AMP
AFT
EQ
AMP
VIDEO
DET
APC
QIF DET
QIF AGC
QIF AMP
FM DET
VIF AMP
RF AGC
IF AGC
AF AMP
1234
RF AGC DELAY
RF AGC OUT
AFT OUT
VIF IN
5
VIF IN
6
GND
789
QIF DET IN
NFB
IF AGC FILTER
10
AUDIO OUT
1

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M52342SP pdf
MITSUBISHI ICs (TV)
M52342SP
PLL-SPLIT VIF/SIF IC
3. IN the graph, maximum and minimum DC voltage are V2H and
V2L, respectively.
TP2
Voltage
3V
V2H
2V
V2L
f (3) f (2) f (MHz)
1000 (mV)
µ=
f (2) - f (3) (kHz)
(mV/kHz)
IM Intermodulation
1. Input SG11 into VIF IN, and measure EQ output TP18A with an
oscilloscope.
2. Adjust AGC filter voltage V8 so that the minimum DC level of the
output waveform is 1.0V.
3. At this time, measure, TP18A with a spectrum analyzer.
The intermodulation is defined as a difference between 920kHz
and 3.58MHz frequency components.
LIM Limiting sensitivity
1. Input SG17 (SG22) into SIF input, and measure the 400Hz
component level of AF output TP10.
2. Input SG19 (SG24) into SIF input, and measure the 400Hz
component level of AF output TP10.
3. The input limiting sensitivity is defined as the input level when a
difference between each 400Hz components of audio output
(TP10) is 30dB, as shown below.
Audio output
(mVrms)
30dB
Audio output while
SG17 (SG22) is input
Audio output while
SG19 (SG24) is input
AF S/N
1. Input SG20 (SG25) into SIF input, and measure the output noise
level of AF output TP1. This level is named VN.
2. S/N is;
VoAF (mVr.m.s)
S/N=20log VN (mVr.m.s) (dB)
CQIF QIF control
Lower the voltage of V7, and measure the voltage of V7 when DC
voltage of TP13 begins to change.
THE NOTE IN THE SYSTEM SETUP
M52342SP has 2 power supply pins of Vcc (pin 14) and Vreg. OUT
(pin 17). Pin 14 is for AFT output, RF AGC output circuits and 5V
regulated power circuit and Pin 17 is for the other circuit blocks.
In case M52342SP is used together with other ICs like VIF
operating at more than 5V, the same supply voltage as that of
connected ICs is applied to VCC and Vreg. Out is opened. The other
circuit blocks, connected to Vreg. OUT are powered by internal 5V
regulated power supply.
In case the connecting ICs are operated at 5V, 5V is supplied to
both VCC and Vreg.OUT.
LOGIC TABLE
10k “H”
10k “L”
20k “H”
20k “L”
20k “H”
20k “L”
AF
NTSC
PAL
AFT
DEFEAT
NORMAL
DEFEAT
NORMAL
(dBµ) SIF input
AMR AM Rejection
1. Input SG18 (SG23) into SIF input, and measure the output level
of AF output TP10. This level is named VAM.
2. AMR is;
VoAF (mVr.m.s)
AMR=20log
(dB)
VAM (mVr.m.s)
5

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M52342SP arduino
Pin 9 (AUDIO F/B)
5k
5k
MITSUBISHI ICs (TV)
M52342SP
PLL-SPLIT VIF/SIF IC
terminal voltage : 2.1V
9
The FM detector can respond to several kinds of SIF signals without an
adjustment and external components by adopting the PLL technique.
It also is in compliance with the multi-SIF by selecting an appropriate
deemphasis and audio output amplifier using the pin12 switch.
The capacitor between pin 9 and 10, which fixes the deemphasis
characteristics, can be determined considering the combination of an
equivalent resistance of the IC and this capacitor itself.
Pin 10 (AF OUTPUT)
In the 4.5MHz application, the internal voltage gain is increased by 6-dB in
comparison with the other applications and then the signals are delivered
through an emitter follower.
10
terminal voltage : 2.2V
Pin 11 (LIMITER INPUT)
Bias
8k
8k
11
The input impedance is 8k.
Pin 12 (AFT SW, NP SW)
SIF4.5MHz : H
Others : L
10k
VCC (5V)
2k
12
22k
AFT Defeat :H
AFT ON :L
It works as a switch by connecting the resistor to 5V(High)
of GND(Low), alternately.
10k
H
H
L
L
20k
H
L
H
L
AF AMP
AFT
Pin 12
applied voltage
4.5MHz
4.5MHz
OTHER
OTHER
DEFFET
NORMAL
DEFFET
NORMAL
4.4 to 5.0V
2.7 to 4.0V
1.0 to 2.3V
0 to 0.6V
The terminal voltage is set by the external resistors
because of an open base input.
11

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