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PDF M54HC390F1R Data sheet ( Hoja de datos )
| Número de pieza | M54HC390F1R | |
| Descripción | DUAL DECADE COUNTER | |
| Fabricantes | ST Microelectronics | |
| Logotipo |  |
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. HIGH SPEED
fMAX = 84 MHz (TYP.) AT VCC = 5 V
. LOW POWER DISSIPATION
ICC = 4 µA (MAX.) AT TA = 25 °C
. HIGH NOISE IMMUNITY
VNIH = VNIL = 28 % VCC (MIN.)
. OUTPUT DRIVE CAPABILITY
10 LSTTL LOADS
. SYMMETRICAL OUTPUT IMPEDANCE
|IOH| = IOL = 4 mA (MIN.)
. BALANCED PROPAGATION DELAYS
tPLH = tPHL
. WIDE OPERATING VOLTAGE RANGE
VCC (OPR) = 2 V TO 6 V
. PIN AND FUNCTION COMPATIBLE WITH
54/74LS390
M54HC390
M74HC390
DUAL DECADE COUNTER
B1R
(Plastic Package)
F1R
(Ceramic Package)
M 1R
(Micro Package)
C1R
(Chip Carrier)
ORDER CODES :
M 54HC 39 0F 1R
M 74H C3 90 M1 R
M 74HC 39 0B 1R
M 74H C3 90 C1 R
PIN CONNECTIONS (top view)
DESCRIPTION
The M54/74HC390 is a high speed CMOS DUAL
DECADE COUNTER fabricated in silicon gate
C2MOS technology. It has the same high speed per-
formance of LSTTL combined with true CMOS low
power consumption.
This dual decade counter contains two independent
ripple carry counters. Each counter is composed of
a divide-by-two and divide-by-five counter. The
divide-by-two and divide-by-five counters can be
cascaded to form dual decade, dual biquinary, or
various combinations up to a single divide-by-100
counter.
Each 4-bit counter is incremented on the high to low
transition (negative edge) of the clock input, and
each has an independent clear input. When clear is
set low all four bits of each counter are set to low.
This enables count truncation and allows the im-
plementation of divide-by-N counter configurations.
All inputs are equipped with protection circuits
against static discharge and transient excess volt-
age.
February 1993
NC =
No Inter-
nal Con-
1/13
1 page  
PIN DESCRIPTION
PIN No
1, 15
SYMBOL
1 CLOCK A
2 CLOCK B
2, 14
3, 5, 6, 7
4, 12
1 CLEAR
2 CLEAR
1QA to 1QD
1 CLOCK B
2 CLOCK B
13, 11, 10, 9 2QA to 2QD
8 GND
16 VCC
NAME AND FUNCTION
Clock Input Divide by 2
Section (HIGH to LOW
Edge-triggered)
Asynchronous Master
Reset Inputs
Flip Flop Outputs
Clock Input Divide by 5
Section (HIGH to LOW
Edge-triggered)
Flip Flop Outputs
Ground (0V)
Positive Supply Voltage
IEC LOGIC SYMBOL
M54/M74HC390
ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
Value
Unit
VCC Supply Voltage
-0.5 to +7
V
VI DC Input Voltage
-0.5 to VCC + 0.5
V
VO DC Output Voltage
-0.5 to VCC + 0.5
V
IIK DC Input Diode Current
± 20 mA
IOK DC Output Diode Current
± 20 mA
IO DC Output Source Sink Current Per Output Pin
± 25 mA
ICC or IGND DC VCC or Ground Current
± 50 mA
PD Power Dissipation
Tstg Storage Temperature
500 (*)
-65 to +150
mW
oC
TL Lead Temperature (10 sec)
300 oC
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these condition isnotimplied.
(*) 500 mW: ≅ 65 oC derate to 300 mW by 10mW/oC: 65 oC to 85 oC
RECOMMENDED OPERATING CONDITIONS
Symbol
VCC
VI
VO
Top
tr, tf
Parameter
Supply Voltage
Input Voltage
Output Voltage
Operating Temperature: M54HC Series
M74HC Series
Input Rise and Fall Time
VCC = 2 V
VCC = 4.5 V
VCC = 6 V
Value
2 to 6
0 to VCC
0 to VCC
-55 to +125
-40 to +85
0 to 1000
0 to 500
0 to 400
Unit
V
V
V
oC
oC
ns
5/13
5 Page 
DIM.
A
a1
a2
b
b1
C
c1
D
E
e
e3
F
G
L
M
S
M54/M74HC390
SO16 (Narrow) MECHANICAL DATA
MIN.
0.1
0.35
0.19
9.8
5.8
3.8
4.6
0.5
mm
TYP.
0.5
1.27
8.89
MAX.
1.75
0.2
1.65
0.46
0.25
MIN.
0.004
0.013
0.007
45° (typ.)
10 0.385
6.2 0.228
4.0 0.149
5.3 0.181
1.27 0.019
0.62
8° (max.)
inch
TYP.
0.019
0.050
0.350
MAX.
0.068
0.007
0.064
0.018
0.010
0.393
0.244
0.157
0.208
0.050
0.024
P013H
11/13
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| Páginas | Total 13 Páginas | |
| PDF Descargar | [ Datasheet M54HC390F1R.PDF ] | |
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