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PDF CD74HC157E Data sheet ( Hoja de datos )

Número de pieza CD74HC157E
Descripción High Speed CMOS Logic Quad 2-Input Multiplexers
Fabricantes Harris 
Logotipo Harris Logotipo



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SEMICONDUCTOR
September 1997
CD74HC157, CD74HCT157,
CD74HC158, CD74HCT158
High Speed CMOS Logic
Quad 2-Input Multiplexers
Features
Description
• Common Select Inputs
• Separate Enable Inputs
• Buffered inputs and Outputs
• Fanout (Over Temperature Range)
- Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
• Wide Operating Temperature Range . . . -55oC to 125oC
• Balanced Propagation Delay and Transition Times
• Significant Power Reduction Compared to LSTTL
Logic ICs
The Harris CD74HC157, CD74HCT157, CD74HC158 and
CD74HCT158 are quad 2-input multiplexers which select
four bits of data from two sources under the control of a
common Select input (S). The Enable input (E) is active Low.
When (E) is High, all of the outputs in the 158, the inverting
type, (1Y-4Y) are forced High and in the 157, the non-
inverting type, all of the outputs (1Y-4Y) are forced Low,
regardless of all other input conditions.
Moving data from two groups of registers to four common
output busses is a common use of these devices. The state
of the Select input determines the particular register from
which the data comes. They can also be used as function
generators.
• HC Types
- 2V to 6V Operation
- High Noise Immunity: NIL = 30%, NIH = 30%of VCC at
VCC = 5V
• HCT Types
- 4.5V to 5.5V Operation
- Direct LSTTL Input Logic Compatibility,
VIL= 0.8V (Max), VIH = 2V (Min)
- CMOS Input Compatibility, Il 1µA at VOL, VOH
Ordering Information
PART NUMBER TEMP. RANGE (oC) PACKAGE
PKG.
NO.
CD74HC157E
-55 to 125
16 Ld PDIP E16.3
CD74HCT157E
-55 to 125
16 Ld PDIP E16.3
CD74HC158E
-55 to 125
16 Ld PDIP E16.3
CD74HCT158E
-55 to 125
16 Ld PDIP E16.3
Pinout
CD74HC157, CD74HCT157, CD74HC158, CD74HCT158
(PDIP, SOIC)
TOP VIEW
S1
1I0 2
1I1 3
1Y 4
2I0 5
2I1 6
2Y 7
GND 8
16 VCC
15 E
14 4I0
13 4I1
12 4Y
11 3I0
10 3I1
9 3Y
CD74HC157M
-55 to 125
16 Ld SOIC M16.15
CD74HCT157M
-55 to 125
16 Ld SOIC M16.15
CD74HC158M
-55 to 125
16 Ld SOIC M16.15
NOTES:
1. When ordering, use the entire part number. Add the suffix 96 to
obtain the variant in the tape and reel.
2. Wafer or die for this part number is available which meets all elec-
trical specifications. Please contact your local sales office or
Harris customer service for ordering information.
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
Copyright © Harris Corporation 1997
1
File Number 1642.2

1 page




CD74HC157E pdf
CD74HC157, CD74HCT157, CD74HC158, CD74HCT158
Switching Specifications Input tr, tf = 6ns (Continued)
PARAMETER
TEST
VCC
SYMBOL CONDITIONS (V)
25oC
-40oC TO 85oC -55oC TO 125oC
MIN TYP MAX MIN MAX MIN MAX UNITS
Enable to Output
tPLH, tPHL CL = 50pF
2
-
- 135
-
170
-
205 ns
4.5 - - 27 - 34 - 41 ns
HC157
HCT157
CL =15pF
5 - 11 - - - - - ns
- 12 -
-
-
-
- ns
Select to Output
CL = 50pF
tPLH, tPHL CL = 50pF
6 - - 23 - 29 - 35 ns
2
-
- 145
-
180
-
220 ns
4.5 - - 29 - 36 - 44 ns
HC157
HCT157
CL =15pF
5 - 12 - - - - - ns
- 15 -
-
-
-
- ns
Power Dissipation
Capacitance (Notes 4, 5)
CPD
CL = 50pF
-
6 - - 25 - 31 - 38 ns
5
HC157
- 62 -
-
-
-
- pF
HCT157
- 70 -
-
-
-
- pF
HC/HCT158 TYPES
Data to Output
tPLH, tPHL CL = 50pF
2
-
- 140
-
175
-
210 ns
4.5 - - 28 - 35 - 42
HC158
HCT 158
CL =15pF
5 - 11 - - - - - ns
- 13 -
-
-
-
- ns
Enable to Output
CL = 50pF
tPLH, tPHL CL = 50pF
6 - - 24 - 30 - 36 ns
2
-
- 160
-
200
-
240 ns
4.5 - - 32 - 40 - 48 ns
HC158
HCT 158
CL =15pF
5 - 13 - - - - - ns
- 15 -
-
-
-
- ns
Select to Output
CL = 50pF
tPLH, tPHL CL = 50pF
6 - - 27 - 34 - 41 ns
2
-
- 150
-
190
-
225 ns
4.5 - - 30 - 38 - 45 ns
HC158
HCT 158
CL =15pF
5 - 12 - - - - - ns
- 14 -
-
-
-
- ns
CL = 50pF
6 - - 26 - 33 - 38 ns
Output Transition Time
tTLH, tTHL CL = 50pF
2
- - 75 -
95
- 110 ns
4.5 - - 15 - 19 - 22 ns
6 - - 13 - 16 - 19 ns
Power Dissipation
Capacitance (Notes 4, 5)
CPD
-
5
HC158
- 35 -
-
-
-
- pF
HCT 158
- 35 -
-
-
-
- pF
Input Capacitance
CIN CL = 50pF -
- - 10 -
10
NOTES:
4. CPD is used to determine the dynamic power consumption, per multiplexer.
5. PD = VCC2 fi (CPD + CL) where fi = input frequency, CL = output load capacitance, VCC = supply voltage.
-
10 pF
5

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