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HYM72V8025GS-50- fiches techniques PDF

Siemens - 8M x 72-Bit EDO- DRAM Module

Numéro de référence HYM72V8025GS-50-
Description 8M x 72-Bit EDO- DRAM Module
Fabricant Siemens 
Logo Siemens 





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HYM72V8025GS-50- fiche technique
8M × 72-Bit EDO- DRAM Module
(ECC - Module)
168 pin buffered DIMM Module
HYM 72V8025GS-50/-60
HYM 72V8035GS-50/-60
168 pin JEDEC Standard, Buffered 8 Byte Dual In-Line Memory Module
for PC main memory applications
1 bank 8 M x 72 organisation
Optimized for ECC applications
Hyper Page Mode - EDO Operation
Performance:
tRAC
tCAC
tAA
tRC
tHPC
RAS Access Time
CAS Access Time
Access Time from Address
Cycle Time
EDO Mode Cycle Time
-50
50 ns
18 ns
30 ns
84 ns
20 ns
-60
60 ns
20 ns
35 ns
104 ns
25 ns
Single + 3.3V ± 0.3 V supply
CAS-before-RAS refresh, RAS-only refresh
Decoupling capacitors mounted on substrate
All inputs, outputs and clock fully LVTTL & LVCMOS compatible
4 Byte interleave enabled, Dual Address inputs (A0/B0)
Buffered inputs excepts RAS and DQ
Parallel Presence Detects
Utilizes nine 8M × 8 -DRAMs and BiCMOS buffers/line drivers VT244A
Two versions: HYM 72V8035GS with SOJ-components ( 9 mm module thickness)
HYM 72V8025GS with TSOPII-components ( 4 mm module thickness)
4048 refresh cycles / 64 ms with 12 / 11 addressing
Gold contact pad
Double sided module with 25.35 mm (1000 mil) height
Semiconductor Group
1
3.97

PagesPages 11
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