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HYM72V2005GS-60 fiches techniques PDF

Siemens - 2M x 72-Bit EDO-DRAM Module

Numéro de référence HYM72V2005GS-60
Description 2M x 72-Bit EDO-DRAM Module
Fabricant Siemens 
Logo Siemens 





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HYM72V2005GS-60 fiche technique
2M × 72-Bit EDO-DRAM Module
(ECC - Module)
168 pin buffered DIMM Module
HYM 72V2005GS-50/-60
168 pin JEDEC Standard, Buffered 8 Byte Dual In-Line Memory Module
for PC main memory applications
1 bank 2 M x 72 organisation
Optimized for ECC applications
Extended Data Out (EDO)
Performance:
tRAC
tCAC
tAA
tRC
tHPC
RAS access time
CAS access time
Access time from address
Read/Write cycle time
Fast page mode cycle time
-50 -60
50 60 ns
18 20 ns
30 35 ns
84 104 ns
20 25 ns
Single + 3.3V ± 0.3 V supply
CAS-before-RAS refresh, RAS-only refresh
Decoupling capacitors mounted on substrate
All inputs, outputs and clock fully LVTTL & LVCMOS compatible
4 Byte interleave enabled, Dual Address inputs (A0/B0)
Buffered inputs excepts RAS and DQ
Parallel Presence Detects
Utilizes nine 2M × 8 -DRAMs and BiCMOS buffers/line drivers
2048 refresh cycles / 32 ms with 11 / 10 addressing
Gold contact pad
Double sided module with 25.35 mm (1000 mil) height
Semiconductor Group
1
11.96

PagesPages 11
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