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PDF HYM72V2005GS-50- Data sheet ( Hoja de datos )

Número de pieza HYM72V2005GS-50-
Descripción 2M x 72-Bit EDO-DRAM Module
Fabricantes Siemens 
Logotipo Siemens Logotipo



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No Preview Available ! HYM72V2005GS-50- Hoja de datos, Descripción, Manual

2M × 72-Bit EDO-DRAM Module
(ECC - Module)
168 pin buffered DIMM Module
HYM 72V2005GS-50/-60
168 pin JEDEC Standard, Buffered 8 Byte Dual In-Line Memory Module
for PC main memory applications
1 bank 2 M x 72 organisation
Optimized for ECC applications
Extended Data Out (EDO)
Performance:
tRAC
tCAC
tAA
tRC
tHPC
RAS access time
CAS access time
Access time from address
Read/Write cycle time
Fast page mode cycle time
-50 -60
50 60 ns
18 20 ns
30 35 ns
84 104 ns
20 25 ns
Single + 3.3V ± 0.3 V supply
CAS-before-RAS refresh, RAS-only refresh
Decoupling capacitors mounted on substrate
All inputs, outputs and clock fully LVTTL & LVCMOS compatible
4 Byte interleave enabled, Dual Address inputs (A0/B0)
Buffered inputs excepts RAS and DQ
Parallel Presence Detects
Utilizes nine 2M × 8 -DRAMs and BiCMOS buffers/line drivers
2048 refresh cycles / 32 ms with 11 / 10 addressing
Gold contact pad
Double sided module with 25.35 mm (1000 mil) height
Semiconductor Group
1
11.96

1 page




HYM72V2005GS-50- pdf
HYM72V2005GS-50/-60
2M x 72-ECC Module
Absolute Maximum Ratings
Operating temperature range ......................................................................................... 0 to + 70 °C
Storage temperature range...................................................................................... – 55 to + 125 °C
Input/output voltage ............................................................................... -0.5 to min (Vcc+0.5, 4.6) V
Power supply voltage................................................................................................. – 0.5V to 4.6 V
Power dissipation.................................................................................................................... 5,8 W
Data out current (short circuit) ................................................................................................ 50 mA
Note: Stresses above those listed under "Absolute Maximum Ratings" may cause permanent
damage to the device. Exposure to absolute maximum rating conditions for extended periods
may affect device reliability.
DC Characteristics
TA = 0 to 70 °C; VCC = 3.3 V ± 0.3 V
Parameter
Symbol
Input high voltage
VIH
Input low voltage
VIL
Output high voltage (LVTTL)
Output „H“level voltage ( IOUT = – 2 mA)
VOH
Output low voltage (LVTTL)
Output „L“level voltage ( IOUT = + 2 mA)
VOL
Output high voltage (LVCMOS)
Output „H“level voltage ( IOUT = – 100 µA)
VOH
Output low voltage (LVCMOS)
Output „L“level voltage ( IOUT = + 100 µA)
VOL
Input leakage current
(0 V < VIN < Vcc, all other pins = 0 V)
II(L)
Output leakage current
(DO is disabled, 0 V < VOUT < Vcc)
IO(L)
Average VCC supply current:
ICC1
-50 version
-60 version
Limit Values Unit
min.
max.
2.0 Vcc + 0.3 V
– 0.3
0.8
V
2.4 –
V
Test
Condition
1)
1)
1)
– 0.4 V 1)
Vcc-0.2 –
V 1)
– 0.2 V 1)
– 20 20
µA 1)
– 20 20
µA 1)
1080
mA 2) 3) 4)
– 990 mA
(RAS, CAS, address cycling, tRC = tRC min.)
Standby VCC supply current
(RAS = CAS = 2.4V, one address change
within 15,6 µs trc )
ICC2
50 mA –
Semiconductor Group
5

5 Page





HYM72V2005GS-50- arduino
L-DIM-168-22
Module package
(dual read-out, single in-line memory module)
133,35
127,35
HYM72V2005GS-50/-60
2M x 72-ECC Module
9,0
1 10 11
43,18
66,68
A
85 94 95
40 41
B
124 125
84
C
168
6,35
2,0
Detail A
6,35
2,0
Detail B
1,27 1,0 +- 0.5
Detail C
0,2 +- 0,15
DM168-22.WMF
preliminary drawing
Semiconductor Group
11

11 Page







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