PDF HYM64V1005GU-5 Data sheet ( Hoja de datos )

Número de pieza	HYM64V1005GU-5
Descripción	3.3V 1M x 64-Bit EDO-DRAM Module 3.3V 1M x 72-Bit EDO-DRAM Module
Fabricantes	Siemens
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No Preview Available ! 3.3V 1M × 64-Bit EDO-DRAM Module 3.3V 1M x 72-Bit EDO-DRAM Module 168pin unbuffered DIMM Module with serial presence detect HYM64V1005GU-50/-60 HYM72V1005GU-50/-60 • 168 Pin JEDEC Standard, Unbuffered 8 Byte Dual In-Line Memory Module for PC main memory applications • 1 bank 1M x 64, 1M x 72 organisation • Optimized for byte-write non-parity or ECC applications • Extended Data Out (EDO) • Performance: tRAC tCAC tAA tRC tHPC RAS Access Time CAS Access Time Access Time from Address Cycle Time EDO Mode Cycle Time -50 50 ns 13 ns 25 ns 84 ns 20 ns -60 60 ns 15 ns 30 ns 104 ns 25 ns • Single +3.3 V ± 0.3 V Power Supply • CAS-before-RAS refresh, RAS-only-refresh • Decoupling capacitors mounted on substrate • All inputs, outputs and clocks are fully LV-TTL compatible • Serial presence detects (optional) • Utilizes four 1M × 16 -DRAMs in TSOPII-50/44 and two 1M x 4 - DRAMs in SOJ 26/20 packages • 1024 refresh cycles / 16 ms with 10 / 10 addressing (Row / Column) • Gold contact pad • Card Size: 133,35mm x 25,40 mm x 5,30 mm • This DRAM product module family is intended to be fully pin and architecture compatible with the 168pin unbuffered SDRAM DIMM module family Semiconductor Group 1 2.97 1 page HYM 64(72)V1005GU-50/-60 1M x 64/72 DRAM Module RAS0 WE0 OE0 CAS0 DQ0-DQ7 OE WE RAS LCAS I/O1-I/O8 RAS2 WE2 OE2 OE WE RAS CAS4 LCAS DQ32-DQ39 I/O1-I/O8 CAS1 DQ8-DQ15 UCAS I/O9-I/O16 CAS5 UCAS DQ40-DQ47 I/O9-I/O16 D0 D2 CB0-CB3 OE WE RAS CAS I/O1-I/O4 D4 CB4-CB7 OE WE RAS CAS I/O1-I/O4 D5 OE WE RAS CAS2 LCAS DQ16-DQ23 I/O1-I/O8 OE WE RAS CAS6 LCAS DQ48-DQ55 I/O1-I/O8 CAS3 UCAS DQ24-DQ31 I/O9-I/O16 CAS7 UCAS DQ56-DQ63 I/O9-I/O16 D1 D3 A0-A9 VCC VSS D0-D5 C0-C5 E2PROM (256wordx8bit) SA0 SA1 SA2 SCL SDA 1M x 72 DIMM Module Block Diagram Semiconductor Group 5 5 Page HYM 64(72)V1005GU-50/-60 1M x 64/72 DRAM Module AC Characteristics (contd’ ) 5)6) TA = 0 to 70 °C,VCC = 3.3 V ± 0.3 V, tT = 2 ns Parameter Symbol Limit Values -50 -60 min. max. min. max. Hyper Page Mode (EDO) Read-modify-Write Cycle Hyper page mode (EDO) read-write tPRWC 58 – 68 – cycle time CAS precharge to WE tCPWD 41 – 49 – Unit ns ns 16E Note CAS-before-RAS Refresh Cycle CAS setup time CAS hold time RAS to CAS precharge time Write to RAS precharge time Write hold time referenced to RAS tCSR tCHR tRPC tWRP tWRH 10 – 10 – ns 10 – 10 – ns 5 – 5 – ns 10 – 10 – ns 10 – 10 – ns Capacitance TA = 0 to 70 °C; VCC = 3.3 V ± 0.3 V; f = 1 MHz Parameter Input Capacitance (A0 to A9) Input Capacitance (RAS0, RAS2) Input Capacitance (CAS0-CAS7) Input Capacitance (WE0,WE2,OE0,OE2) I/O Capacitance (DQ0-DQ63,CB0-CB8) Input Capacitance (SCL, SA0-2) Input/Output Capacitance (SDA) Symbol CI1 CI2 CI3 CI4 CIO1 Cs Cs Limit Values min. max. – 55 – 50 – 10 – 50 – 11 –8 – 10 Unit pF pF pF pF pF pF pF Semiconductor Group 11 11 Page

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Hoja de datos destacado

Número de pieza	Descripción	Fabricantes
HYM64V1005GU-5	3.3V 1M x 64-Bit EDO-DRAM Module 3.3V 1M x 72-Bit EDO-DRAM Module	Siemens
HYM64V1005GU-50	3.3V 1M x 64-Bit EDO-DRAM Module 3.3V 1M x 72-Bit EDO-DRAM Module	Siemens
HYM64V1005GU-60	3.3V 1M x 64-Bit EDO-DRAM Module 3.3V 1M x 72-Bit EDO-DRAM Module	Siemens

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