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PDF HYM368035GS-60 Data sheet ( Hoja de datos )

Número de pieza HYM368035GS-60
Descripción 8M x 36-Bit EDO-DRAM Module
Fabricantes Siemens 
Logotipo Siemens Logotipo



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8M × 36-Bit EDO-DRAM Module
HYM 368035S/GS-60
Advanced Information
8 388 608 words by 36-Bit organization in 2 banks
Fast access and cycle time
60 ns RAS access time
15 ns CAS access time
104 ns cycle time
Hyper page mode (EDO) capability
25 ns cycle time
Single + 5 V (± 10 %) supply
Low power dissipation
max. 7260 mW active
CMOS – 132 mW standby
TTL – 264 mW standby
CAS-before-RAS refresh
RAS-only-refresh
Hidden-refresh
24 decoupling capacitors mounted on substrate
All inputs, outputs and clocks fully TTL compatible
72 pin Single in-Line Memory Module (L-SIM-72-17) with 31.75 mm (1250 mil) height
Utilizes 24 4M x 3 DRAM’s in 300 mil SOJ packages
2048 refresh cycles / 32 ms
Optimized for use in byte-write parity applications
Tin-Lead contact pads (HYM 368035S-60)
Gold contact pads (HYM 368035GS-60)
Semiconductor Group
1
4.96

1 page




HYM368035GS-60 pdf
HYM 368035S/GS-60
8M × 36-Bit EDO-Module
Absolute Maximum Ratings
Operation temperature range ......................................................................................... 0 to + 70 ˚C
Storage temperature range......................................................................................... – 55 to 125 ˚C
Input/output voltage ........................................................................ – 0.5 V to min (VCC + 0.5, 7.0) V
Power supply voltage...................................................................................................... – 1 to + 7 V
Power dissipation................................................................................................................... 9.24 W
Data out current (short circuit) ................................................................................................ 50 mA
Note: Stresses above those listed under "Absolute Maximum Ratings" may cause permanent
damage of the device. Exposure to absolute maximum rating conditions for extended periods
may affect device reliability.
DC Characteristics
TA = 0 to 70 ˚C, VCC = 5 V ± 10 %
Parameter
Input high voltage
Input low voltage
Output high voltage (IOUT = – 5 mA)
Output low voltage (IOUT = 4.2 mA)
Input leakage current
(0 V < VIN < 6.5 V, all other pins = 0 V)
Output leakage current
(DO is disabled, 0 V < VOUT < 5.5 V)
Average VCC supply current
(RAS, CAS, address cycling, tRC = tRC min)
-60 ns version
Symbol
VIH
VIL
VOH
VOL
II(L)
IO(L)
ICC1
Limit Values
min.
max.
2.4
– 0.5
VCC + 0.5
0.8
2.4 –
– 0.4
– 80 80
Unit
V
V
V
V
µA
Test
Condition
1)
1)
1)
1)
1)
– 10 10
µA 1)
1320
mA
2),3),4)
Standby VCC supply current
(RAS = CAS = VIH)
Average VCC supply current
during RAS only refresh cycles
(RAS cycling, CAS = VIH, tRC = tRC min)
-60 ns version
ICC2
ICC3
48 mA
1320
mA 2),4)
Semiconductor Group
5

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