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PDF HYM368025GS-60 Data sheet ( Hoja de datos )

Número de pieza HYM368025GS-60
Descripción 8M x 36-Bit EDO - DRAM Module
Fabricantes Siemens 
Logotipo Siemens Logotipo



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8M x 36-Bit EDO - DRAM Module
HYM 368025S/GS-50/-60
SIMM modules with 8 388 608 words by 36-bit organization in two banks
for PC main memory applications
Fast access and cycle time
50 ns access time
84 ns cycle time (-50 version)
60 ns access time
104 ns cycle time (-60 version)
Hyper Page Mode (EDO) capability
20 ns cycle time (-50 version)
25 ns cycle time (-60 version)
Single + 5 V (± 10 %) supply
Low power dissipation
max. 6820 mW active (-50 version)
max. 6160 mW active (-60 version)
CMOS – 132 mW standby
TTL –264 mW standby
CAS-before-RAS refresh
RAS-only-refresh
Hidden-refresh
Decoupling capacitors mounted on substrate
All inputs, outputs and clocks fully TTL compatible
72 pin Single in-Line Memory Module (L-SIM-72-14) with 31.75 mm height
Utilizes sixteen 4Mx4-EDO-DRAMs and eight 4M x 1 EDO-DRAMs
in 300 mil wide SOJ packages
2048 refresh cycles / 32 ms
Optimized for use in byte-write parity applications
Tin-Lead contact pads (S- version)
Gold contact pads (GS - version)
Semiconductor Group
1
4.97

1 page




HYM368025GS-60 pdf
HYM 368025S/GS-50/-60
8M × 36-Bit EDO-Module
Absolute Maximum Ratings
Operation temperature range ......................................................................................... 0 to + 70 °C
Storage temperature range......................................................................................... – 55 to 125 °C
Input/output voltage ............................................................................ –0.5V to min (Vcc+0.5, 7.0) V
Power supply voltage...................................................................................................... – 1 to + 7 V
Power dissipation................................................................................................................... 9.24 W
Data out current (short circuit) ................................................................................................ 50 mA
Note: Stresses above those listed under "Absolute Maximum Ratings" may cause permanent
damage of the device. Exposure to absolute maximum rating conditions for extended periods
may affect device reliability.
DC Characteristics
TA = 0 to 70 °C, VCC = 5 V ± 10 %
Parameter
Input high voltage
Input low voltage
Output high voltage (IOUT = – 5 mA)
Output low voltage (IOUT = 4.2 mA)
Input leakage current
(0 V < VIN < 6.5 V, all other pins = 0 V)
Output leakage current
(DO is disabled, 0 V < VOUT < 5.5 V)
Average VCC supply current
(RAS, CAS, address cycling, tRC = tRC min)
-50 version
-60 version
Standby VCC supply current
(RAS = CAS = VIH)
Average VCC supply current
during RAS only refresh cycles (per bank)
(RAS cycling, CAS = VIH, tRC = tRC min)
-50 version
-60 version
Symbol
VIH
VIL
VOH
VOL
II(L)
IO(L)
ICC1
ICC2
ICC3
Limit Values
min.
max.
2.4 Vcc+0.5
– 0.5
0.8
2.4 –
– 0.4
– 20 20
Unit
V
V
V
V
µA
Test
Condition
1)
1)
1)
1)
1)
– 20
20 µA 1)
1240
mA 2),3),4)
– 1120 mA
– 48 mA
1240
mA 2),4)
– 1120 mA
Semiconductor Group
5

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