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PDF HYM324000GD- Data sheet ( Hoja de datos )
| Número de pieza | HYM324000GD- | |
| Descripción | 4M x 32-Bit Dynamic RAM Module SMALL OUTLINE MEMORY MODULE | |
| Fabricantes | Siemens | |
| Logotipo |  |
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4M × 32-Bit Dynamic RAM Module
SMALL OUTLINE MEMORY MODULE
HYM 324000GD-50/-60
Preliminary Information
• 4 0194 034 words by 32-bit organization
• Fast access and cycle time
50 ns access time
95 ns cycle time (-50 version)
60 ns access time
110 ns cycle time (-60 version)
• Fast page mode capability with
35 ns cycle time (-50 version)
40 ns cycle time (-60 version)
• Single + 3.3 V (± 0.3 V) supply
• Low power dissipation
max. 1008 mW active (-50 version)
max. 864 mW active (-60 version)
LVCMOS – 1.8 mW standby
TTL – 14.4 mW standby
• CAS-before-RAS refresh, RAS-only-refresh. Self Refresh
• 2 decoupling capacitors mounted on substrate
• All inputs, outputs and clock fully TTL compatible
• 72 pin, dual read-out, one bank, Small Outline DIMM Module
• Utilizes two 4M × 16 -DRAMs (HYB 3165160T)
• 4096 refresh cycles / 64 ms
• Gold contact pad
Semiconductor Group
181
11.94
1 page  
HYM324000GD-50/-60
4M x 32 SO-DIMM
DC Characteristics (cont’d)
TA = 0 to 70 ˚C, VSS = 0 V, VCC = 3 V ± 0.3 V
Parameter
Symbol Limit Values
min. max.
Average Vcc supply current,
during fast page mode:
ICC4
-50 ns version
-60 ns version
(RAS = VIL, CAS, address cycling: tPC=tPC min.)
Standby Vcc supply current
(RAS=CAS= Vcc-0.2V)
ICC5
–
–
–
170
150
400
Average Vcc supply current, during CAS-before- ICC6
RAS refresh mode:
-50 ns version
-60 ns version
(RAS, CAS cycling: tRC = tRC min.)
–
–
280
240
Self Refresh Current
Average Power Supply Current during Self Refresh.
(CBR cycle with tRAS>TRASSmin, CAS held low,
WE = Vcc-0.2V, Address and Din=Vcc-0.2V or 0.2V)
ICC7
–
400
Unit Note
mA 3) 4) 5)
mA
A–
mA 3) 4)
mA
A
Semiconductor Group
185
5 Page | ||
| Páginas | Total 6 Páginas | |
| PDF Descargar | [ Datasheet HYM324000GD-.PDF ] | |
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