|
|
PDF HYB514256BJ-50 Data sheet ( Hoja de datos )
| Número de pieza | HYB514256BJ-50 | |
| Descripción | 256 K x 4-Bit Dynamic RAM Low Power 256 K x 4-Bit Dynamic RAM | |
| Fabricantes | Siemens | |
| Logotipo |  |
|
Hay una vista previa y un enlace de descarga de HYB514256BJ-50 (archivo pdf) en la parte inferior de esta página. Total 22 Páginas | ||
|
No Preview Available !
256 K × 4-Bit Dynamic RAM
Low Power 256 K × 4-Bit Dynamic RAM
HYB 514256B/BJ-50/-60/-70
HYB 514256BL/BJL-50/-60/-70
Advanced Information
• 262 144 words by 4-bit organization
• Fast access and cycle time
50 ns access time
95 ns cycle time (-50 version)
60 ns access time
110 ns cycle time (-60 version)
70 ns access time
130 ns cycle time (-70 version)
• Fast page mode cycle time
35 ns (-50 version)
40 ns (-60 version)
45 ns (-70 version)
• Low power dissipation
max. 495 mW active (-50 version)
max. 440 mW active (-60 version)
max. 385 mW active (-70 version)
max. 5.5 mW standby
max. 1.1 mW standby for L-version
Ordering Information
Type
HYB 514256B-50
HYB 514256B-60
HYB 514256B-70
HYB 514256BJ-50
HYB 514256BJ-60
HYB 514256BJ-70
HYB 514256BL-50
HYB 514256BL-60
HYB 514256BL-70
HYB 514256BJL-50
HYB 514256BJL-60
HYB 514256BJL-70
Ordering Code
Q67100-Q1044
Q67100-Q530
Q67100-Q433
Q67100-Q1054
Q67100-Q536
Q67100-Q537
on request
Q67100-Q542
Q67100-Q543
on request
Q67100-Q608
Q67100-Q607
• Single + 5 V (± 10 %) supply with a built-in VBB
generator
• Output unlatched at cycle end allows two-
dimensional chip selection
• Read-modify-write, CAS-before-RAS
refresh, RAS-only refresh, hidden-refresh
and fast page mode capability
• All inputs, outputs and clocks
TTL-compatible
• 512 refresh cycles/8 ms
512 refresh cycles/64 ms
for L-version only
• Plastic Packages: P-DIP-20-2,
P-SOJ-26/20-1
Package
P-DIP-20-2
P-DIP-20-2
P-DIP-20-2
P-SOJ-26/20-1
P-SOJ-26/20-1
P-SOJ-26/20-1
P-DIP-20-2
P-DIP-20-2
P-DIP-20-2
P-SOJ-26/20-1
P-SOJ-26/20-1
P-SOJ-26/20-1
Description
DRAM (access time 50ns)
DRAM (access time 60 ns)
DRAM (access time 70 ns)
DRAM (access time 50 ns)
DRAM (access time 60 ns)
DRAM (access time 70 ns)
DRAM (access time 50 ns)
DRAM (access time 60 ns)
DRAM (access time 70 ns)
DRAM (access time 50 ns)
DRAM (access time 60 ns)
DRAM (access time 70 ns)
Semiconductor Group
55
01.95
1 page  
HYB 514256B/BL/BJ/BJL-50/-60/-70
256 K × 4-DRAM
Absolute Maximum Ratings
Operating temperature range .........................................................................................0 to + 70 ˚C
Storage temperature range......................................................................................– 55 to + 150 ˚C
Soldering temperature ............................................................................................................260 ˚C
Soldering time .............................................................................................................................10 s
Input/output voltage ........................................................................................................ – 1 to + 7 V
Power supply voltage...................................................................................................... – 1 to + 7 V
Power dissipation..................................................................................................................... 0.6 W
Data out current (short circuit) ................................................................................................ 50 mA
Note: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent
damage of the device. Exposure to absolute maximum rating conditions for extended periods may
affect device reliability.
DC Characteristics
TA = 0 to 70 ˚C; VSS = 0 V; VCC = 5 V ± 10 %
Parameter
Symbol
Limit Values
min.
max.
Input high voltage
VIH
Input low voltage
VIL
Output high voltage (IOUT = – 5 mA)
VOH
Output low voltage (IOUT = 4.2 mA)
VOL
Input leakage current, any input
(0 V ≤ VIN ≤ 6.5 V, all other pins = 0 V)
II(L)
Output leakage current
(DO is disabled, 0 V ≤ VOUT ≤ VCC)
IO(L)
Average VCC supply current:
-50 version
ICC1
-60 version
-70 version
(RAS, CAS, address cycling: tRC = tRC min.)
Standby VCC supply current (RAS = CAS = VIH) ICC2
Average VCC supply current, RAS only mode:
-50 version
-60 version
ICC3
-70 version
(RAS cycling: CAS = VIH : tRC = tRC min.)
2.4
– 1.0
2.4
–
– 10
– 10
6.5
0.8
–
0.4
10
10
– 90
– 80
– 70
–2
– 90
– 80
– 70
Unit Test
Condition
V 1)
V 1)
V 1)
V 1)
µA 1)
µA 1)
mA
mA
mA
2) 3)
2) 3)
2) 3)
mA –
mA 2)
mA 2)
mA 2)
Semiconductor Group
59
5 Page 
HYB 514256B/BL/BJ/BJL-50/-60/-70
256 K × 4-DRAM
Waveforms
RAS
V
IH
VIL
CAS
V
IH
VIL
V
IH
A0 - A8
VIL
V
IH
WE
VIL
V
IH
OE
VIL
V
I/O1-I/O4 IH
(Inputs) VIL
V
I/O1-I/O4 OH
(Outputs) VOL
tRC
tRAS
tRP
tCSH
tRCD
tRSH
tCAS
tASR
tRAD
tASC
tCAH
Row
Address
Column
Address
tRAL
tRAH tRCS
tAA
tOEA
tCRP
tASR
tRCH
tRRH
Row
Address
tDZC
tDZO
tCAC
tCLZ
Hi Z
tRAC
tODD
tCDD
tOEZ
tOFF
Valid Data Out
Hi Z
“H” or “L”
Read Cycle
Semiconductor Group
65
11 Page | ||
| Páginas | Total 22 Páginas | |
| PDF Descargar | [ Datasheet HYB514256BJ-50.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| HYB514256BJ-50 | 256 K x 4-Bit Dynamic RAM Low Power 256 K x 4-Bit Dynamic RAM | Siemens |
| Número de pieza | Descripción | Fabricantes |
| SLA6805M | High Voltage 3 phase Motor Driver IC. |
 Sanken |
| SDC1742 | 12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters. |
 Analog Devices |
|
DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares, |
| DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar |