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HYB514100BJ-50 fiches techniques PDF

Siemens - 4M x 1-Bit Dynamic RAM

Numéro de référence HYB514100BJ-50
Description 4M x 1-Bit Dynamic RAM
Fabricant Siemens 
Logo Siemens 





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HYB514100BJ-50 fiche technique
4M × 1-Bit Dynamic RAM
HYB 514100BJ-50/-60
Advanced Information
• 4 194 304 words by 1-bit organization
• 0 to 70 °C operating temperature
• Fast Page Mode Operation
• Performance:
tRAC RAS access time
tCAC CAS access time
tAA Access time from address
tRC Read/Write cycle time
tPC Fast page mode cycle time
-50 -60
50 60 ns
13 15 ns
25 30 ns
95 110 ns
35 40 ns
• Single + 5 V (± 10 %) supply with a built-in VBB generator
• Low power dissipation
max. 660 mW active (-50 version)
max. 605 mW active (-60 version)
• Standby power dissipation:
11 mW max. standby (TTL)
5.5 mW max. standby (CMOS)
• Output unlatched at cycle end allows two-dimensional chip selection
• Read, write, read-modify write, CAS-before-RAS refresh, RAS-only refresh,
hidden refresh and test mode capability
• All inputs and outputs TTL-compatible
• 1024 refresh cycles/16 ms
• Plastic Packages: P-SOJ-26/20-2 with 300 mil width
Semiconductor Group
1
1998-10-01

PagesPages 21
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