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Número de pieza TDA5345HT
Descripción 5 V spindle & VCM driver combo
Fabricantes NXP Semiconductors 
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No Preview Available ! TDA5345HT Hoja de datos, Descripción, Manual

INTEGRATED CIRCUITS
DATA SHEET
TDA5345HT
5 V spindle & VCM driver combo
Preliminary specification
1999 June 10

1 page




TDA5345HT pdf
Philips Semiconductors
5 V spindle & VCM driver combo
Preliminary specification
TDA5345HT
PINNING (GREY ROWS MEANS NEW PINS))
SYMBOL
SpinVddA
SpinRectBemf
SpinMotA
VcmVddM
SpinGndAB
VcmMinus
n.c.1
SpinMotB
VcmGndPow
SpinVddBC
VcmPlus
n.c.2
SpinMotC
VcmVddP
SpinGndC
GNDAna1
VcmCompensOut
VcmRef
VcmCompensIn
VcmInput
VcmVdd5Div2
VcmSenseInM
VcmSenseInP
Vdd5Ana1
PorN
PorCap
BdGap
Por5Adj
VcmBemf
OpAmpInM
OpAmpOut
GNDAna2
RefCurRes
Reg3v3PwrUp
PumpNeg3 V
Neg3 V
PowerFault
CLOCK
SDATA
Vdd5Dig
PIN #
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
DESCRIPTION
spindle MotA half bridge power supply
spindle “Clamp”: rectified Bemf
spindle power output: A
VCM- half bridge power supply
spindle MotA & MotB half bridges ground
VCM inverted power output (VCM-)
not connected ; connect it to ground
spindle power output: B
VCM H-bridge ground
spindle MotC & MotB half bridges power supply
VCM non-inverted power output
not connected; connect it to ground
spindle power output: C
VCM+ half bridge power supply
spindle MotC half bridge ground
analog ground
VCM error amplifier output
VCM loop reference voltage (1.5 V)
VCM error amplifier inverted input
VCM loop input
internal Vdd5/2 reference voltage for the VCM
VCM sense amplifier inverted input
VCM sense amplifier non-inverted input
analog power supply
power On Reset output
external capacitor used to set the Power On Reset delay
internal band-gap reference voltage (for production trimming)
5 V power on reset threshold adjustment
VCM Back-Emf amplifier output
VCM Back Emf Operational Amplifier inverted input
VCM Back Emf Operational Amplifier output
analog ground
external 33 kresistor
hardware enable / disable for the 3.3 V regulator (at Power Up)
-3 V regulator pump capacitor
-3 V regulator output sense pin
battery low warning
digital timing clock
serial port Data line
digital power supply
1999 June 10
5
I/O
I
O
O
SUPPLY
GROUND
O
GROUND
O
GROUND
I
O
GROUND
O
SUPPLY
GROUND
GROUND
O
O
I
I
I/O
I
I
SUPPLY
O
O
I
I
O
I
O
GROUND
O
I
O
I
O
I
I
SUPPLY

5 Page





TDA5345HT arduino
Philips Semiconductors
5 V spindle & VCM driver combo
Preliminary specification
TDA5345HT
Table 2 Serial Interface REGISTERS floorplan
BIT\
REG
0
1
2
3
4
5
6
7
8
9
11 10
9
8
7
6
5
4
3
2
1
0
RegNeg RegNeg RegNeg Presc
Clk2
Clk1
Clk0 Factor1
[0] [1] [0] [0]
StartUp StartUp StartUp StartUp
Delay3 Delay2 Delay1 Delay0
Blank Blank Blank Blank
Delay3 Delay2 Delay1 Delay0
T_Full T_Full T_Full T_Slow
Power2 Power1 Power0 Ret5
FlyBack FlyBack Shock Shock
Slope1 Slope0 Thresh1 Thresh0
Speed Speed Speed PllCur
bit14 bit13 bit12
1
Speed
bit11
Dac12a
bit11
Dac12b
bit11
Speed
bit10
Dac12a
bit10
Dac12b
bit10
Shock
Thresh2
[0]
Speed
bit9
Dac12a
bit9
Dac12b
bit9
Speed
bit8
Dac12a
bit8
Dac12b
bit8
Presc
Factor0
[0]
ComDe
Lim3
DigOut
Mux
[1]
T_Slow
Ret4
Vcm
Retract
[0]
PllCur
0
Speed
bit7
Dac12a
bit7
Dac12b
bit7
BiasCT
[0]
ComDe
Lim2
BdGap
Adj2
[0]
T_Slow
Ret3
Vcm
Sleep
[1]
Dac6
ToVCM
[0]
Speed
bit6
Dac12a
bit6
Dac12b
bit6
Run/
Stop
[0]
ComDe
Lim1
BdGap
Adj1
[0]
T_Slow
Ret2
Dac12
Sleep
[1]
Dac6
bit5
Speed
bit5
Dac12a
bit5
Dac12b
bit5
Pll Manual
Enable
[0] [0]
ComDe Watch
Lim0 Dog3
BdGAp VcmRet
Adj0 SoftRis
[0]
T_Slow T_Slow
Ret1 Ret0
RegNeg Shock
Sleep Sleep
[1] [1]
Dac6
bit4
Dac6
bit3
Speed
bit4
Dac12a
bit4
Dac12b
bit4
Speed
bit3
Dac12a
bit3
Dac12b
bit3
Man
Com2
Watch
Dog2
Vretract
2
T_Vcm
Brake2
Spin
Sleep
[1]
Dac6
bit2
Speed
bit2
Dac12a
bit
Dac12b
bit2
Man
Com1
Watch
Dog1
Vretract
1
T_Vcm
Brake1
Reg3v3
Enable
[0]
Dac6
bit1
Speed
bit1
Dac12a
bit1
Dac12b
bit1
Man
Com0
Watch
Dog0
Vretract
0
T_Vcm
Brake0
Temp
Select
[0]
Dac6
bit0
Speed
bit0
Dac12a
bit0
Dac12b
bit0
Note:
1. [1] (or [0]) means that the bit is set to 1 (or 0) when PorN is low => default value at power up.
2. Use register 7 (Dac12a) for low VCM loop gain and register 8 (Dac12b) for high gain.
Control bits:
REGISTER #0:
Bits [11, 9] (RegNegClk[2, 0]): The Negative supply (-3V) regulator needs a 500 kHz clock. A programmable divider
genreates this frequency from the external clock ([15-33] Mhz). Programmation is on 3 bits.
Bits [8, 7] (PrescFactor[1, 0]): used to select the prescaler division factor (see next section: “commutation control”).
Bit 6 (BiasCT): used to bias the spindle centre tap at Vdd5/2 when the spindle outputs are disabled (Run/Stop = 0). The
back-EMF comparator remains operational when BiasCT = 1, to check if the spindle is running for instance.
Bit 5 (Run/Stop): after the power supply is turned on and PorN is high, the motor will start spinning when Run/Stop is
set to ‘1’. The spindle power output starts from state code 0 (see table 3). The motor will stop when this bit is set to ‘0’.
The 3 spindle power outputs are then switched off. No brake is applied.
bit 4 (PllEnable): enables the PLL to improve the speed accuracy.
Bit 3 (Manual): selects the manual commutation mode (Run/Stop bit also needs to be high). When getting out of the
manual mode (=> Manual = ‘0’) and keeping the Run/Stop bit high, the internal commutation block will start from the last
state programmed in manual mode.
Bits [2, 0] (ManCom[2, 0]): control the commutation in manual mode when Run/Stop = 1 & Manual = 1.
1999 June 10
11

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