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PDF TDA4884 Data sheet ( Hoja de datos )

Número de pieza TDA4884
Descripción Advanced monitor video controller for OSD
Fabricantes NXP Semiconductors 
Logotipo NXP Semiconductors Logotipo



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INTEGRATED CIRCUITS
DATA SHEET
TDA4884
Three gain control video
pre-amplifier for OSD
Product specification
Supersedes data of June 1994
File under Integrated Circuits, IC02
1997 Nov 26

1 page




TDA4884 pdf
Philips Semiconductors
Three gain control video pre-amplifier for OSD
Product specification
TDA4884
6 PINNING
SYMBOL
GC2
VIN1
GC1
GND
VIN2
CC
VP
VIN3
HBL
CL
GC3
FB3
VOUT3
IOUT3
FB2
VOUT2
IOUT2
FB1
VOUT1
IOUT1
PIN DESCRIPTION
1 gain control channel 2
2 signal input channel 1
3 gain control channel 1
4 ground
5 signal input channel 2
6 contrast control, OSD switch
7 supply voltage
8 signal input channel 3
9 horizontal blanking, switch-off
10
input clamping, vertical blanking,
test mode
11 gain control channel 3
12 feedback channel 3
13 voltage output channel 3
14 current output channel 3
15 feedback channel 2
16 voltage output channel 2
17 current output channel 2
18 feedback channel 1
19 voltage output channel 1
20 current output channel 1
handbook, halfpage
GC2 1
20 IOUT1
VIN1 2
19 VOUT1
GC1 3
18 FB1
GND 4
17 IOUT2
VIN2 5
CC 6
16 VOUT2
TDA4884
15 FB2
VP 7
VIN3 8
14 IOUT3
13 VOUT3
HBL 9
12 FB3
CL 10
11 GC3
MHA918
Fig.2 Pin configuration.
7 FUNCTIONAL DESCRIPTION
The RGB input signals 0.7 V (p-p) are capacitively coupled
into the TDA4884 (pins 2, 5 and 8) from a low ohmic
source and are clamped to an internal DC voltage (artificial
black level). Composite signals will not disturb normal
operations because an internal clipping circuit cuts all
signal parts below black level. All channels have a
maximum total voltage gain of 7 dB (maximum contrast
and maximum individual channel gain). With the nominal
channel gain of 1 dB and nominal contrast setting the
nominal black-to-white output amplitude is 0.79 V (p-p).
DC voltages are used for contrast and gain control.
7.1 Contrast control
Contrast control is achieved by a voltage at pin 6 and
affects the three channels simultaneously. To provide the
correct white point, an individual gain control (pins 3, 1 and
11) adjusts the signals of channels 1, 2 and 3.
7.2 Output stages
Each output stage provides a current output (pins 20, 17
and 14) and a voltage output (pins 19, 16 and 13). External
cascode transistors reduce power consumption of the IC
and prevent breakdown of the output transistors. Signal
output currents and peaking characteristics are
determined by external components at the voltage outputs
and the video supply. The channels have separate internal
feedback loops which ensure large signal linearity and
marginal signal distortion irrespective of output transistor
thermal VBE variation.
7.3 Input clamping
The clamping pulse (pin 10) is used for input clamping
only. The input signals have to be at black level during the
clamping pulse and are clamped to an internal artificial
black level. The coupling capacitors are used in this way
for black-level storage. Because the threshold for the
clamping pulse is higher than that for vertical blanking
(pin 10) the rise and fall times of the clamping pulse need
1997 Nov 26
5

5 Page





TDA4884 arduino
Philips Semiconductors
Three gain control video pre-amplifier for OSD
Product specification
TDA4884
Notes to the characteristics
1. Definition of levels:
a) Artificial black level: internal signal level behind input emitter follower during input clamping and signal clipping.
This level is inserted instead of the input signal during blanking.
b) Reference black level: DC voltage during output clamping at voltage outputs, not influenced by contrast or gain
setting, adjustable by cut-off stabilization.
c) Cut-off level: corresponding DC voltage at CRT cathode in closed feedback loop.
d) Black level: actual signal black level at either voltage outputs or cathode. At voltage outputs the black level is
equal to reference black level because there is no brightness control via TDA4884. At cathode the black level is
equal to cut-off level. Brightness can be adjusted via grid 1.
e) Ultra-black level, switch-off level: lowest adjustable reference black level, lowest signal level at voltage outputs.
f) The minimum guaranteed control range for reference black level is 0.1 to 1 V.
The ultra-black level is dependant on the external resistor RO at pins 13, 16 and 19 (voltage outputs) to ground.
g) Vbl (SO) 3----.--5-----k--R----O---+-----R-----O- × 4.65 V
h) Signal processing see Fig.4.
2. Linear control range is 1 to 6 V for Vi(CC), independent of supply voltage. Open pin 6 leads to absolute maximum
contrast setting. It is recommended not to exceed Vi(CC) = VP 1 V to avoid saturation of internal circuitry. For
Vi(CC) < Vi(CC)(min) 0.7 V a small negative signal (≈ −40 dB) will appear. For frequency dependency of contrast
control see note 14. Typical contrast characteristic see Fig.5.
3. Definition for nominal output signals: input Vi(b-w) = 0.7 V, gain pins 3, 1 and 11 open-circuit, contrast control
Vi(CC) = Vi(CC)(nom).
4.
Gtrack
=
20 × maximum of
log
A--A---1-1-0-
×
-A-A---2-2-0-
;
log
A--A---1-1-0-
×
A--A---3-3-0- 
;
log
A--A---2-2-0-
×
-A-A---3-3-0-
dB
Ax: signal output amplitude in channel x at any contrast setting between 1 and 6 V.
Ax0: signal output amplitude in channel x at nominal contrast and same gain setting.
5. Typical step in contrast voltage and response at signal outputs for nominal input signal Vi(b-w) = 0.7 V. Typical OSD
fast blanking input/output see Fig.7.
6. Linear control range is 1 to 6 V for Vi(GC), independent of supply voltage. Typical gain characteristic see Fig.6.
7. The internal reference voltage can be measured at pins 18, 15 and 12 during output clamping (Vi(HBL) = 2 V) in closed
feedback loop. Typical variation of Vref(int) with temperature and power supply voltage see Fig.8.
8. Slow variations of video supply voltage VCRT (see Fig.1) will be suppressed at CRT cathode by cut-off stabilization.
Change of VCRT by 5 V leads to specified change of cut-off voltage.
9. The test mode allows testing without input and output clamping pulses. The signal inputs (pins 2, 5 and 8) have to
be biased via resistors to the previously measured clamp voltages of approximately 3 V (artificial black level + VBE).
Signal blanking is not possible during test mode.
10. The signal-to-noise ratio is calculated by the formula (frequency range 1 to 70 MHz):
N-S-- = 20 × log p----e---a----k------t-o-------pR---e--M-a----kS----v--v-a--a--l-lu-u--e--e---o--o--f-f--t-t-h-h--e-e----n-n---o-o--m-i-s---ie-n----ao---l-u--s-t--pi-g--u--n-t--a--v-l--o-o--l--tu-a--t--gp---eu---t---v---o----l-t--a---g---e-- dB
11. Large output swing e.g. Io(b-w) = 50 mA leeds to signal depending power dissipation in output transistors.
Thermal VBE variation is compensated.
12. Composite signals will not disturb normal operations because an internal clipping circuit cuts all signal parts below
black level. Typical sync clipping see Fig.10.
1997 Nov 26
11

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