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Número de pieza | TDA4866 | |
Descripción | Full bridge current driven vertical deflection booster | |
Fabricantes | NXP Semiconductors | |
Logotipo | ||
Hay una vista previa y un enlace de descarga de TDA4866 (archivo pdf) en la parte inferior de esta página. Total 16 Páginas | ||
No Preview Available ! INTEGRATED CIRCUITS
DATA SHEET
TDA4866
Full bridge current driven vertical
deflection booster
Product specification
Supersedes data of 1996 Oct 10
File under Integrated Circuits, IC02
1999 Jun 14
1 page Philips Semiconductors
Full bridge current driven vertical deflection
booster
Product specification
TDA4866
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134); voltages referenced to pin 5 (GND); unless
otherwise specified.
SYMBOL
VP
VFB
IFB
V1, V2
I1, I2
V4, V6
I4, I6
V9
I9
V8
I8
Tstg
Tamb
Tj
Ves
PARAMETER
supply voltage (pin 3)
flyback supply voltage (pin 7)
flyback supply current
input voltage
input current
output voltage
output current
feedback voltage
feedback current
guard voltage
guard current
storage temperature
operating ambient temperature
junction temperature
electrostatic handling for all pins
CONDITIONS
note 1
note 2
note 3
note 4
MIN.
0
0
0
0
0
0
0
0
0
0
0
−20
−20
−20
−500
MAX.
30
60
±1.8
VP
±5
VP
±1.8
VP
±5
VP + 0.4
±5
+150
+75
+150
+500
UNIT
V
V
A
V
mA
V
A
V
mA
V
mA
°C
°C
°C
V
Notes
1. Maximum output currents I4 and I6 are limited by current protection.
2. For VP > 13 V the guard voltage V8 is limited to 13 V.
3. Internally limited by thermal protection; switching point ≥150 °C.
4. Equivalent to discharging a 200 pF capacitor through a 0 Ω series resistor.
THERMAL CHARACTERISTICS
SYMBOL
Rth(j-mb)
PARAMETER
thermal resistance from junction to mounting base
VALUE
4
UNIT
K/W
1999 Jun 14
5
5 Page Philips Semiconductors
Full bridge current driven vertical deflection
booster
Product specification
TDA4866
handbook, full pagewidth
TDA4866
VFB
1N4448
7
6 2.2 Ω
vertical
output
signal
BC556
3.3 kΩ
22 µF
VP
2.2
kΩ
GUARD output
HIGH = error
BC548
220
kΩ
MED754
Fig.6 Application circuit for external guard signal generation.
INTERNAL PIN CONFIGURATION
book, full pagewidth
VP
TDA4866
8
VP
2
1
37
6
5
9 VP
VP
1999 Jun 14
Fig.7 Internal circuits.
11
4
MED755
11 Page |
Páginas | Total 16 Páginas | |
PDF Descargar | [ Datasheet TDA4866.PDF ] |
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