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PDF TDA2579C Data sheet ( Hoja de datos )
| Número de pieza | TDA2579C | |
| Descripción | Synchronization circuit with synchronized vertical divider system for 60 Hz | |
| Fabricantes | NXP Semiconductors | |
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INTEGRATED CIRCUITS
DATA SHEET
TDA2579C
Synchronization circuit with
synchronized vertical divider
system for 60 Hz
Preliminary specification
File under Integrated Circuits, IC02
January 1994
Philips Semiconductors
1 page  
Philips Semiconductors
Synchronization circuit with synchronized
vertical divider system for 60 Hz
Preliminary specification
TDA2579C
PINNING
SYMBOL
VOUT
FB
SAW
VDC
VID
CSL
RSL
ϕ1
GND
VP
HOUT
FLYB
MUTE
HSHIFT
HOSC
STAB
SC
DET
PIN DESCRIPTION
1 vertical driver output
2 vertical feedback input
3 vertical sawtooth generator
4 vertical deflection current output
5 video signal input
6 slicing level storage capacitor
7 slicing level resistor
8 phase detector ϕ1
9 ground (0 V)
10 main supply voltage (+12 V)
11 horizontal driver output
12 horizontal flyback pulse input
13 mute output
14 horizontal picture shift capacitor
15 horizontal oscillator frequency
setting
16 start circuit stabilizer input
17 sandcastle output
18 coincidence detector output
VOUT 1
18 DET
FB 2
17 SC
SAW 3
16 STAB
VDC 4
VID 5
CSL 6
TDA2579C
15 H OSC
14 H SHIFT
13 MUTE
RSL 7
ϕ1 8
GND 9
12 FLYB
11 H OUT
10 VP
MGA790
Fig.2 Pin configuration.
FUNCTIONAL DESCRIPTION
The TDA2579C generates both horizontal and vertical
drive signals, a 3-level sandcastle output pulse, a
transmitter identification signal and 60 Hz window
information.
The horizontal oscillator and horizontal output stage
functions are started via the supply current into pin 16.
The required current has a typical value of 5 mA which can
be taken directly from the mains rectifier. The horizontal
output transistor at pin 11 is not conducting until the supply
current at pin 16 has reached its typical value. The starting
circuit has a hysteresis of approximately 1 mA. The
horizontal output current of pin 11 starts at a duty cycle of
60%. All other IC functions are enabled via the main supply
voltage on pin 10.
The pin 16 supply system enables slaved synchronized
switch mode systems in which the horizontal output signal
of the TDA2579C is used as master signal. In such a
system the 12 V supply (main supply at pin 10) can be
generated by the line output stage.
An internal Zener diode reference voltage is used for the
vertical processing part. The IC embodies a synchronized
divider system for generating the vertical sawtooth at
pin 3. Thus no vertical frequency adjustment is required.
The circuit operation is restricted to the M (fV = 60 Hz)
system.
Vertical part (pins 1, 2, 3 and 4)
The IC embodies a synchronized divider system for
generating the vertical sawtooth at pin 3. The divider
system has an internal frequency doubling circuit, thus the
horizontal oscillator is operating at its nominal line
frequency and one line period equals 2 clock pulses.
No vertical frequency adjustment is required due to the
divider system. The divider system operates with
3 different reset windows for maximum
interference/disturbance protection.
The windows are activated via an up/down counter.
The counter increases its value by 1 each time the
separated vertical sync pulse is within the window being
searched. The count is reduced by 1 when the vertical
sync pulse is not present.
The reset of the counter system (clock pulse 0) is at half a
line period after the start of the vertical pulse at pin 5.
January 1994
5
5 Page 
Philips Semiconductors
Synchronization circuit with synchronized
vertical divider system for 60 Hz
Preliminary specification
TDA2579C
LIMITING VALUES
In accordance with Absolute Maximum Rating System (IEC 134).
SYMBOL
PARAMETER
CONDITIONS
I16
VP
Ptot
Tstg
Tamb
start current
supply voltage
total power dissipation
storage temperature
operating ambient temperature
V10 = 0 V
MIN.
−
−
−
−55
−25
MAX.
9.7
13.2
1.2
+150
+70
UNIT
mA
V
W
°C
°C
THERMAL RESISTANCE
SYMBOL
PARAMETER
Rth j-a
from junction to ambient in free air
THERMAL RESISTANCE
50 K/W
CHARACTERISTICS
VP = V10 = 12 V; I16 = 6.2 mA; Tamb = 25 °C; unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
Supply
VP
I16
supply voltage (pin 10)
supply current (pin 16)
V16 stabilized voltage (pin 16)
I10 current consumption (pin 10)
Video input (pin 5)
V5
V5(p-p)
SL
top sync level
sync pulse amplitude (peak-to-peak value)
slicing level
td delay between video input and detector
output
S/N signal-to-noise ratio with sync pulse noise
level detector circuit active
note 1
V10 = 0 V
V10 = 1 to 10 V;
Tamb ≤ 70 °C
V10 > 10 V
note 2
note 3
see Fig.5
CVBS = 1 V without
filter at pin 5; note 4
Sync pulse
HYS
noise level detector circuit hysteresis
Noise gate (pin 5)
V5 switching level
MIN. TYP. MAX. UNIT
10 12
6.2 −
6.2 −
2.5 −
8.8 9.3
− 70
13.2 V
9.7 mA
8.7 mA
9.7 mA
9.7 V
85 mA
1.5 3.1
0.05 0.6
35 50
0.2 0.3
− 19
3.75 V
1V
65 %
0.55 µs
− dB
− 3 − dB
− 0.7 1 V
January 1994
11
11 Page | ||
| Páginas | Total 24 Páginas | |
| PDF Descargar | [ Datasheet TDA2579C.PDF ] | |
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