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PDF TDA1312A Data sheet ( Hoja de datos )
| Número de pieza | TDA1312A | |
| Descripción | Stereo continuous calibration DAC CC-DAC | |
| Fabricantes | NXP Semiconductors | |
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INTEGRATED CIRCUITS
DATA SHEET
TDA1312A; TDA1312AT
Stereo continuous calibration
DAC (CC-DAC)
Preliminary specification
File under Integrated Circuits, IC01
July 1993
1 page  
Philips Semiconductors
Stereo continuous calibration
DAC (CC-DAC)
Preliminary specification
TDA1312A; TDA1312AT
PINNING
SYMBOL
BCK
DATAR
DATAL
GND
VDD
VOL
VOR
WS
PIN DESCRIPTION
1 bit clock input
2 right data input
3 left data input
4 ground
5 positive supply voltage
6 left channel output
7 right channel output
8 word select input
handbook, halfpage
BCK 1
8 WS
DATAR
DATAL
GND
2 TDA1312 7
3 TDA1312AT 6
45
MGE224
VOR
VOL
VDD
Fig.2 Pin configuration.
FUNCTIONAL DESCRIPTION
The basic operation of the continuous calibration DAC is
illustrated in Fig.3. The figure shows the calibration and
operation cycle. During calibration of the MOS current
source (Fig.3a) transistor M1 is connected as a diode by
applying a reference current. The voltage Vgs on the
intrinsic gate-source capacitance Cgs of M1 is then
determined by the transistor characteristics. After
calibration of the drain current to the reference value Iref,
the switch S1 is opened and S2 is switched to the other
position (Fig.3b). The gate-to-source voltage Vgs of M1 is
not changed because the charge on Cgs is preserved.
Therefore, the drain current of M1 will still be equal to IREF
and this exact duplicate of IREF is now available at the OUT
terminal.
The 32 current sources and the spare current source of the
TDA1312A; AT are continuously calibrated (see Fig.1).
The spare current source is included to allow continuous
converter operation. The output of one calibrated source is
connected to an 11-bit binary current divider consisting of
2048 transistors. A symmetrical offset decoding principle
is incorporated and arranges the bit switching in such a
way that the zero-crossing is performed only by switching
the LSB currents.
The TDA1312A; AT (CC-DAC) accepts serial input data
formats of 16-bit word length. Left and right data words are
time multiplexed. The most significant bit (bit 1) must
always be first. The input data format is shown in Figs.4
and 5.
Data is placed in the right and left input registers (see
Fig.1). The data in the input registers is simultaneously
latched in the output registers which control the bit
switches.
An internal offset voltage VOFF is added to the full scale
output voltage VFS; VOFF and VFS are proportional to VDD:
Where VDD1/VDD2 = VFS1/VFS2 = VOFF1/VOFF2.
July 1993
5
5 Page 
Philips Semiconductors
Stereo continuous calibration
DAC (CC-DAC)
Preliminary specification
TDA1312A; TDA1312AT
SO8: plastic small outline package; 8 leads; body width 3.9 mm
SOT96-1
D
y
Z
8
c
5
EA
X
HE v M A
pin 1 index
1
e
A2
A1
4
bp
wM
Q
(A3)
A
Lp
L
detail X
θ
0 2.5 5 mm
scale
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
A
UNIT max. A1 A2 A3 bp
c D(1) E(2) e
HE
L
Lp Q
v
mm
1.75
0.25
0.10
1.45
1.25
0.25
0.49
0.36
0.25
0.19
5.0
4.8
4.0
3.8
1.27
6.2
5.8
1.05
1.0
0.4
0.7
0.6
0.25
inches
0.069
0.010
0.004
0.057
0.049
0.01
0.019 0.0100 0.20
0.014 0.0075 0.19
0.16
0.15
0.050
0.244
0.228
0.041
0.039
0.016
0.028
0.024
0.01
w y Z (1)
0.25
0.01
0.1
0.7
0.3
0.004
0.028
0.012
θ
8o
0o
Notes
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
OUTLINE
VERSION
SOT96-1
IEC
076E03S
REFERENCES
JEDEC
EIAJ
MS-012AA
EUROPEAN
PROJECTION
ISSUE DATE
95-02-04
97-05-22
July 1993
11
11 Page | ||
| Páginas | Total 13 Páginas | |
| PDF Descargar | [ Datasheet TDA1312A.PDF ] | |
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