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PDF 74LS377 Data sheet ( Hoja de datos )
| Número de pieza | 74LS377 | |
| Descripción | OCTAL D FLIP-FLOP WITH ENABLE; HEX D FLIP-FLOP WITH ENABLE; 4-BIT D FLIP-FLOP WITH ENABLE | |
| Fabricantes | Motorola Semiconductors | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de 74LS377 (archivo pdf) en la parte inferior de esta página. Total 7 Páginas | ||
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OCTAL D FLIP-FLOP WITH ENABLE;
HEX D FLIP-FLOP WITH ENABLE;
4-BIT D FLIP-FLOP WITH ENABLE
The SN54 / 74LS377 is an 8-bit register built using advanced Low Power
Schottky technology. This register consists of eight D-type flip-flops with a
buffered common clock and a buffered common clock enable.
The SN54 / 74LS378 is a 6-Bit Register with a buffered common enable.
This device is similar to the SN54 / 74LS174, but with common Enable rather
than common Master Reset.
The SN54 / 74LS379 is a 4-Bit Register with buffered common Enable. This
device is similar to the SN54 / 74LS175 but features the common Enable
rather then common Master Reset.
• 8-Bit High Speed Parallel Registers
• Positive Edge-Triggered D-Type Flip Flops
• Fully Buffered Common Clock and Enable Inputs
• True and Complement Outputs
• Input Clamp Diodes Limit High Speed Termination Effects
PIN NAMES
LOADING (Note a)
HIGH
LOW
E Enable (Active LOW) Input
0.5 U.L.
0.25 U.L.
D0 – D3
CP
Data Inputs
Clock (Active HIGH Going Edge) Input
0.5 U.L.
0.5 U.L.
0.25 U.L.
0.25 U.L.
Q0 – Q3
Q0 – Q3
True Outputs (Note b)
Complemented Outputs (Note b)
10 U.L.
10 U.L.
5 (2.5) U.L.
5 (2.5) U.L.
NOTES:
a) 1 TTL Unit Load (U.L.) = 40 µA HIGH/1.6 mA LOW.
b) The Output LOW drive factor is 2.5 U.L. for Military (54) and 5 U.L. for Commercial
(74) Temperature Ranges.
SN54/74LS377
SN54/74LS378
SN54/74LS379
OCTAL D FLIP-FLOP WITH
ENABLE; HEX D FLIP-FLOP
WITH ENABLE; 4-BIT D FLIP-FLOP
WITH ENABLE
LOW POWER SCHOTTKY
20
1
20
1
20
1
16
1
J SUFFIX
CERAMIC
CASE 732-03
N SUFFIX
PLASTIC
CASE 738-03
DW SUFFIX
SOIC
CASE 751D-03
J SUFFIX
CERAMIC
CASE 620-09
16
1
N SUFFIX
PLASTIC
CASE 648-08
16
1
D SUFFIX
SOIC
CASE 751B-03
ORDERING INFORMATION
SN54LSXXXJ Ceramic
SN74LSXXXN Plastic
SN74LSXXXDW SOIC
SN74LSXXXD SOIC
FAST AND LS TTL DATA
5-533
1 page  
SN54/74LS377 • SN54/74LS378 • SN54/74LS379
TRUTH TABLE
E CP Dn Qn Qn
H X No No
Change Change
L HHL
L LLH
L = LOW Voltage Level
H = HIGH Voltage Level
X = Immaterial
AC WAVEFORMS
CP
D OR E
Q
SN54 / 74LS377
1.3 V
ts(H)
* 1.3 V
1/fmax
tW
ts(L)
th(H)
tPLH
1.3 V
1.3 V
th(L)
1.3 V
tPHL
1.3 V
Figure 1. Clock to Output Delays Clock Pulse
Width, Frequency, Setup and Hold Times Data
or Enable to Clock
CP
E, D
Q
SN54 / 74LS378
1.3 V
ts(H)
1/fmax
tW
ts(L)
th(H)
* 1.3 V
tPHL
1.3 V
1.3 V
th(L)
1.3 V
tPLH
1.3 V
Figure 2. Clock to Output Delays Clock Pulse
Width, Frequency, Setup and Hold Times Data
or Enable to Clock
CP
E, D
Q
SN54 / 74LS379
1.3 V
ts(H)
* 1.3 V
1/fmax
tW
ts(L)
th(H)
tPLH
1.3 V
1.3 V
th(L)
1.3 V
tPHL
1.3 V
*The shaded areas indicate when the input is permitted to change for predictable output performance.
Figure 3. Clock to Output Delays Clock Pulse
Width, Frequency, Setup and Hold Times Data,
Enable to Clock
FAST AND LS TTL DATA
5-537
5 Page | ||
| Páginas | Total 7 Páginas | |
| PDF Descargar | [ Datasheet 74LS377.PDF ] | |
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