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PDF 74LS257 Data sheet ( Hoja de datos )
| Número de pieza | 74LS257 | |
| Descripción | 3-STATE Quad 2-Data Selectors/Multiplexers | |
| Fabricantes | Fairchild Semiconductor | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de 74LS257 (archivo pdf) en la parte inferior de esta página. Total 5 Páginas | ||
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June 1989
Revised November 1999
DM74LS257B
3-STATE Quad 2-Data Selectors/Multiplexers
General Description
These Schottky-clamped high-performance multiplexers
feature 3-STATE outputs that can interface directly with
data lines of bus-organized systems. With all but one of the
common outputs disabled (at a high impedance state), the
low impedance of the single enabled output will drive the
bus line to a HIGH or LOW logic level. To minimize the pos-
sibility that two outputs will attempt to take a common bus
to opposite logic levels, the output enable circuitry is
designed such that the output disable times are shorter
than the output enable times.
This 3-STATE output feature means that n-bit (paralleled)
data selectors with up to 258 sources can be implemented
for data buses. It also permits the use of standard TTL reg-
isters for data retention throughout the system.
Features
s 3-STATE versions LS157 and LS158 with same pinouts
s Schottky-clamped for significant improvement in A-C
performance
s Provides bus interface from multiple sources in
high-performance systems
s Average propagation delay from data input 12 ns
s Typical power dissipation: 50 mW
Ordering Code:
Order Number Package Number
Package Description
DM74LS257BM
M16A
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow
DM74LS257BN
N16E
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagram
Logic Diagram
Function Table
Output
Control
H
L
L
L
L
H = HIGH Level
L = LOW Level
Inputs
Select A
B
X XX
L LX
L HX
H XL
H XH
X = Don’t Care
Z = High Impedance (off)
Output Y
LS257
Z
L
H
L
H
© 1999 Fairchild Semiconductor Corporation DS006417
www.fairchildsemi.com
1 page  
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Package Number N16E
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be rea-
sonably expected to result in a significant injury to the
user.
2. A critical component in any component of a life support
device or system whose failure to perform can be rea-
sonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
www.fairchildsemi.com
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| Páginas | Total 5 Páginas | |
| PDF Descargar | [ Datasheet 74LS257.PDF ] | |
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