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PDF 74LCXZ162244MEX Data sheet ( Hoja de datos )
| Número de pieza | 74LCXZ162244MEX | |
| Descripción | Low Voltage 16-Bit Buffer/Line Driver with 5V Tolerant Inputs/Outputs and 26 Series Resistors in the Outputs | |
| Fabricantes | Fairchild Semiconductor | |
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September 2000
Revised September 2000
74LCXZ162244
Low Voltage 16-Bit Buffer/Line Driver with 5V Tolerant
Inputs/Outputs and 26Ω Series Resistors in the Outputs
General Description
The LCXZ162244 contains sixteen non-inverting buffers
with 3-STATE outputs designed to be employed as a mem-
ory and address driver, clock driver, or bus oriented trans-
mitter/receiver. The device is nibble controlled. Each nibble
has separate 3-STATE control inputs which can be shorted
together for full 16-bit operation.
When VCC is between 0 and 1.5V, the LCXZ162244 is in
the high impedance state during power up or power down.
this places the outputs in the high impedance (Z) state pre-
venting intermittent low impedance loading or glitching in
bus oriented applications.
The LCXZ162244 is designed for low voltage (2.7V or
3.3V) VCC applications with capability of interfacing to a 5V
signal environment.
In addition the outputs include 26Ω (nominal) series resis-
tors to reduce overshoot and undershoot and are designed
to sink/source 12 mA at VCC = 3.0V.
The LCXZ162244 is fabricated with an advanced CMOS
technology to achieve high speed operation while maintain-
ing CMOS low power dissipation.
Features
s 5V tolerant inputs and outputs
s Guaranteed power up/down high impedance
s Supports live insertion/withdrawal
s Outputs have equivalent 26Ω series resistors
s 2.7V–3.6V VCC specifications provided
s 5.3 ns tPD max (VCC = 3.0V), 20 µA ICC max
s ±12 mA output drive (VCC = 3.0V)
s Implements patented noise/EMI reduction circuitry
s Latch-up performance exceeds 500 mA
s ESD performance:
Human body model > 2000V
Machine model > 200V
Ordering Code:
Order Number
Package
Number
Package Description
74LCXZ162244MEA
MS48A
48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300 Wide
[TUBES]
74LCXZ162244MEX
(Note 1)
MS48A
48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300 Wide
[TAPE and REEL]
74LCXZ162244MTD
MTD48
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
[TUBES]
74LCXZ162244MTX
(Note 1)
MTD48
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
[TAPE and REEL]
Note 1: Use this Order Number to receive devices in Tape and Reel.
© 2000 Fairchild Semiconductor Corporation DS500251
www.fairchildsemi.com
1 page  
AC LOADING and WAVEFORMS Generic for LCX Family
FIGURE 1. AC Test Circuit (CL includes probe and jig capacitance)
VI
6V for VCC = 3.3V, 2.7V
VCC * 2 for VCC = 2.5V
CL
50 pF
30 pF
Waveform for Inverting and Non-Inverting Functions
3-STATE Output High Enable and
Disable Times for Logic
Propagation Delay. Pulse Width and trec Waveforms
Setup Time, Hold Time and Recovery Time for Logic
3-STATE Output Low Enable and
Disable Times for Logic
trise and tfall
FIGURE 2. Waveforms
(Input Characteristics; f =1MHz, tR = tF = 3ns)
Symbol
Vmi
Vmo
Vx
Vy
VCC
3.3V ± 0.3V
2.7V
1.5V
1.5V
1.5V
1.5V
VOL + 0.3V
VOH − 0.3V
VOL + 0.3V
VOH − 0.3V
5 www.fairchildsemi.com
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| Páginas | Total 8 Páginas | |
| PDF Descargar | [ Datasheet 74LCXZ162244MEX.PDF ] | |
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