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Zetex Semiconductors - N-CHANNEL ENHANCEMENT MODE VERTICAL DMOS FET

Numéro de référence ZVN4206A
Description N-CHANNEL ENHANCEMENT MODE VERTICAL DMOS FET
Fabricant Zetex Semiconductors 
Logo Zetex Semiconductors 





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ZVN4206A fiche technique
N-CHANNEL ENHANCEMENT
MODE VERTICAL DMOS FET
ISSUE 2 – JUNE 94
FEATURES
* 60 Volt VDS
* RDS(on) = 1
ZVN4206A
D
G
S
ABSOLUTE MAXIMUM RATINGS.
PARAMETER
Drain-Source Voltage
Continuous Drain Current at Tamb=25°C
Pulsed Drain Current
Gate-Source Voltage
Power Dissipation at Tamb=25°C
Operating and Storage Temperature Range
SYMBOL
VDS
ID
IDM
VGS
Ptot
Tj:Tstg
E-LINE
TO92 COMPATIBLE
VALUE
60
600
8
± 20
0.7
-55 to +150
UNIT
V
mA
A
V
W
°C
ELECTRICAL CHARACTERISTICS (at Tamb = 25°C unless otherwise stated).
PARAMETER
SYMBOL MIN. MAX. UNIT CONDITIONS.
Drain-Source Breakdown
Voltage
BVDSS
60
V ID=1mA, VGS=0V
Gate-Source Threshold
Voltage
VGS(th) 1.3 3
V ID=1mA, VDS= VGS
Gate-Body Leakage
IGSS
100 nA VGS=± 20V, VDS=0V
Zero Gate Voltage Drain
Current
IDSS
10 µA VDS=60V, VGS=0
100 µA VDS=48V, VGS=0V, T=125°C(2)
On-State Drain Current(1)
ID(on)
3
A VDS=25V, VGS=10V
Static Drain-Source On-State RDS(on)
Resistance (1)
1
1.5
VGS=10V,ID=1.5A
VGS=5V,ID=500mA
Forward Transconductance(1)(2gfs
)
300
mS VDS=25V,ID=1.5A
Input Capacitance (2)
Common Source Output
Capacitance (2)
Ciss
Coss
100 pF
60 pF VDS=25V, VGS=0V, f=1MHz
Reverse Transfer Capacitance Crss
(2)
20 pF
Turn-On Delay Time (2)(3)
td(on)
8 ns
Rise Time (2)(3)
Turn-Off Delay Time (2)(3)
tr
td(off)
12 ns VDD 25V, ID=1.5A
12 ns
Fall Time (2)(3)
tf 15 ns
(1) Measured under pulsed conditions. Width=300µs. Duty cycle 2% (2) Sample test.
(3) Switching times measured with 50source impedance and <5ns rise time on a pulse generator

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