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PDF ZNBG2001X10 Data sheet ( Hoja de datos )
| Número de pieza | ZNBG2001X10 | |
| Descripción | FET BIAS CONTROLLER | |
| Fabricantes | Zetex Semiconductors | |
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FET BIAS CONTROLLER
ZNBG2000
ZNBG2001
DEVICE DESCRIPTION
The ZNBG series of devices are designed to meet the
bias requirements of GaAs and HEMT FETs
commonly used in satellite receiver LNBs, PMR,
cellular telephones etc. with a minimum of external
components.
With the addition of two capacitors and a resistor the
devices provide drain voltage and current control for
2 external grounded source FETs, generating the
regulated negative rail required for FET gate biasing
whilst operating from a single supply. This negative
bias, at -3 volts, can also be used to supply other
external circuits.
The ZNBG2000/1 contains two bias stages. A single
resistor allows FET drain current to be set to the
desired level. The series also offers the choice of
drain voltage to be set for the FETs, the ZNBG2000
gives 2.2 volts drain whilst the ZNBG2001 gives 2
volts.
These devices are unconditionally stable over the full
working temperature with the FETs in place, subject
to the inclusion of the recommended gate and drain
capacitors. These ensure RF stability and minimal
injected noise.
It is possible to use less than the devices full
complement of FET bias controls, unused drain and
gate connections can be left open circuit without
affecting operation of the remaining bias circuits.
In order to protect the external FETs the circuits have
been designed to ensure that, under any conditions
including power up/down transients, the gate drive
from the bias circuits cannot exceed the range -3.5V
to 0.7V. Furthermore if the negative rail experiences a
fault condition, such as overload or short circuit, the
drain supply to the FETs will shut down avoiding
excessive current flow.
The ZNBG2000/1 are available in MSOP10 packages
for the minimum in devices size. Device operating
temperature is -40 to 80°C to suit a wide range of
environmental conditions.
FEATURES
• Provides bias for GaAs and HEMT FETs
• Drives up to two FETs
• Dynamic FET protection
• Drain current set by external resistor
• Regulated negative rail generator requires only 2
external capacitors
• Choice in drain voltage
• Wide supply voltage range
• MSOP surface mount package
APPLICATIONS
• Satellite receiver LNBs
• Private mobile radio (PMR)
• Single in single out C Band LNB
• Cellular telephones
ISSUE 1 - AUGUST 2001
1
1 page  
TYPICAL APPLICATION CIRCUIT
ZNBG2000
ZNBG2001
APPLICATIONS
16k
INFORMATION
The above is a partial application circuit for the ZNBG
series showing all external components required for
appropriate biasing. The bias circuits are
unconditionally stable over the full temperature
range with the associated FETs and gate and drain
capacitors in circuit.
Capacitors CD and CG ensure that residual power
supply and substrate generator noise is not allowed
to affect other external circuits which may be
sensitive to RF interference. They also serve to
suppress any potential RF feedthrough between
stages via the ZNBG device. These capacitors are
required for all stages used. Values of 10nF and 4.7nF
respectively are recommended however this is
design dependent and any value between 1nF and
100nF could be used.
The capacitors CNB and CSUB are an integral part of
the ZNBGs negative supply generator. The negative
bias voltage is generated on-chip using an internal
oscillator. The required value of capacitors CNB and
CSUB is 47nF. This generator produces a low current
supply of approximately -3 volts. Although this
generator is intended purely to bias the external
FETs, it can be used to power other external circuits
via the CSUB pin.
Resistor RCAL1 sets the drain current at which all
external FETs are operated. If any bias control circuit
is not required, its related drain and gate connections
may be left open circuit without affecting the
operation of the remaining bias circuits. If all FETs
associated with a current setting resistor are omitted,
the particular RCAL should still be included. The
supply current can be reduced, if required, by using a
high value RCAL resistor (e.g. 470k).
The ZNBG devices have been designed to protect the
external FETs from adverse operating conditions.
With a JFET connected to any bias circuit, the gate
output voltage of the bias circuit can not exceed the
range -3.5V to 0.7V, under any conditions including
powerup and powerdown transients. Should the
negative bias generator be shorted or overloaded so
that the drain current of the external FETs can no
longer be controlled, the drain supply to FETs is shut
down to avoid damage to the FETs by excessive
drain current.
The following diagram show the ZNBG2000/1 in
typical LNB applications.
ISSUE 1 - AUGUST 2001
8
5
5 Page | ||
| Páginas | Total 7 Páginas | |
| PDF Descargar | [ Datasheet ZNBG2001X10.PDF ] | |
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