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PDF PCF8820U Data sheet ( Hoja de datos )
| Número de pieza | PCF8820U | |
| Descripción | 67 x 101 Grey-scale/ECB colour dot matrix LCD driver | |
| Fabricantes | NXP Semiconductors | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de PCF8820U (archivo pdf) en la parte inferior de esta página. Total 30 Páginas | ||
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INTEGRATED CIRCUITS
DATA SHEET
PCF8820
67 × 101 Grey-scale/ECB colour
dot matrix LCD driver
Product specification
File under Integrated Circuits, IC12
2000 Dec 07
1 page  
Philips Semiconductors
67 × 101 Grey-scale/ECB colour dot matrix
LCD driver
Product specification
PCF8820
6 PINNING
6.1 Pad configuration
SYMBOL
R0 to R22
R23 to R33
R34 to R55
R56 to R66
C0 to C100
VSS1
VSS2
VDD1
VDD2
VDD3
VLCDOUT
VLCDSENSE
VLCDIN
V2
V3
V4
V5
SDA_IN
SDA_OUT
SCL
SA0
SA1
OSC
RES
T1
T2
T3
T4
T5
T6
PAD
3 to 25
232 to 222
148 to 127
151 to 161
26 to 126
206 to 211
198 to 203
179 to 184
188 to 194
185 to 187
173 to 178
172
166 to 171
165
164
163
162
195 and 196
197
215 and 216
204
214
220
219
205
221
212
213
217
218
DESCRIPTION
LCD row driver outputs (block 1)
LCD row driver outputs (block 2)
LCD row driver outputs (block 3)
LCD row driver outputs (block 4)
LCD column driver outputs
ground supply 1
ground supply 2
supply voltage 1 of logic
supply voltage 2 of high voltage generator; temperature read-out
supply voltage 3 of high voltage generator; temperature read-out
voltage multiplier output
voltage multiplier regulation input
supply voltage for LCD (bias voltage generator)
LCD intermediate bias voltage 2; for test purposes only
LCD intermediate bias voltage 3; for test purposes only
LCD intermediate bias voltage 4; for test purposes only
LCD intermediate bias voltage 5; for test purposes only
serial data input
serial data output (acknowledge)
serial clock input
I2C-bus slave address input 0 (bit 0)
I2C-bus slave address input 1 (bit 1)
oscillator signal input
external reset input (active LOW)
test 1 input
test 2 output
test 3 I/O
test 4 I/O
test 5 input
test 6 output
The pad configuration is shown in Fig.32.
2000 Dec 07
5
5 Page 
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Frame
VLCD
ROW 0
R0(t)
0.5VLCD
VSS
VLCD
ROW 1
R1(t)
0.5VLCD
VSS
VLCD
COL 0
C0(t)
VSS
VLCD
COL 1
C1(t)
VSS
VLCD
0.5VLCD
Vstate1(t) 0 V
−0.5VLCD
−VLCD
N11
N12
N13
N14
N21
VLCD
0.5VLCD
Vstate2(t) 0 V
−0.5VLCD
−VLCD
0012
7 0 012
70012
7 0012
70012
7
MGT117
Vstate1(t) = C1(t) − R0(t).
Vstate2(t) = C1(t) − R1(t).
Example for setting grey-scale register.
ROW0, COL0: GS = 0
ROW1, COL0: GS = 63 (63 will be set to 64; see Section 8.1.8).
ROW0, COL1: GS = 63 (63 will be set to 64; see Section 8.1.8).
ROW1, COL0: GS = 63 (63 will be set to 64; see Section 8.1.8).
Fig.5 Typical LCD driver waveforms at a multiplex rate of 1 : 8, for partial screen mode and bias system 1/2.
state1
state2
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet PCF8820U.PDF ] | |
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