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PCF8594C-2T02 fiches techniques PDF

NXP Semiconductors - 512 X 8-bit CMOS EEPROM with I2C-bus interface

Numéro de référence PCF8594C-2T02
Description 512 X 8-bit CMOS EEPROM with I2C-bus interface
Fabricant NXP Semiconductors 
Logo NXP Semiconductors 





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PCF8594C-2T02 fiche technique
PCF8594C-2
512 × 8-bit CMOS EEPROM with I2C-bus interface
Rev. 05 — 25 October 2004
Product data
1. Description
The PCF8594C-2 is a floating gate Electrically Erasable Programmable Read Only
Memory (EEPROM) with 4 kbits (512 × 8-bit) non-volatile storage. By using an
internal redundant storage code, it is fault tolerant to single bit errors. This feature
dramatically increases the reliability compared to conventional EEPROMs. Power
consumption is low due to the full CMOS technology used. The programming voltage
is generated on-chip, using a voltage multiplier.
Data bytes are received and transmitted via the serial I2C-bus. Up to four
PCF8594C-2 devices may be connected to the I2C-bus. Chip select is accomplished
by two address inputs (A1 and A2).
Timing of the E/W cycle is carried out internally, thus no external components are
required. Programming Time Control (PTC), Pin 7, must be connected to either VDD
or left open-circuit. There is an option of using an external clock for timing the length
of an E/W cycle.
2. Features
s Low power CMOS:
x 2.0 mA maximum operating current
x maximum standby current 10 µA (at 6.0 V), typical 4 µA
s Non-volatile storage of 4 kbits organized as 512 × 8-bit
s Single supply with full operation down to 2.5 V
s On-chip voltage multiplier
s Serial input/output I2C-bus
s Write operations:
x byte write mode
x 8-byte page write mode (minimizes total write time per byte)
s Read operations:
x sequential read
x random read
s Internal timer for writing (no external components)
s Internal power-on reset
s 0 kHz to 100 kHz clock frequency
s High reliability by using a redundant storage code
s Endurance: 1,000,000 Erase/Write (E/W) cycles at Tamb = 22 °C
s 10 years non-volatile data retention time

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